Question about experimenting with RISC-V P extension (toolchain / simulator)
Thang Trang
Hi,
I'm a final-year student working on my undergraduate thesis related to the RISC-V Packed SIMD P extension.
I'm currently studying the draft specification "Preliminary in-progress RISC-V P Extension Version 0.12-draft (2026-03-08)" and trying to build a small experimental environment to understand and test some of the instructions.
I would like to ask:
Is there any Spike, Sail, or QEMU implementation that supports the P extension?
If not, what would be the recommended starting point to prototype these instructions?
Is modifying Spike decode tables and instruction semantics a reasonable approach for experimentation?
My goal is only to run small test programs and study the behavior of packed SIMD instructions for my thesis.
Any suggestions or references would be greatly appreciated.
Thanks.
Rich Fuhler
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Hi Rich,
Thanks for the pointer.
Hi Jiawei, if you're on this thread, I would really appreciate any insights you might have regarding experimentation with the RISC-V P extension.
Best regards,
-Thang
Thang Trang
Hi Jiawei,
Thank you for your response and for sharing the QEMU implementation.
I noticed that in the QEMU repository (dev-p-018 branch) the P extension seems to follow version 0.18. However, when I checked the RISC-V P extension specification at https://github.com/riscv/riscv-p-spec, the latest version I could find is v0.12.
Could you please let me know where I can find the specification for version 0.18, or if there is a draft available somewhere?
Thank you very much for your help.
Best regards,
Thang
Hi Tang,
We have implemented the QEMU supports for P extension.
You can check it in https://github.com/mollybuild/qemu/tree/dev-p-018
Since I'm not an expert for simulator part, maybe you can ask the committer in QEMU repo.
Best,
Jiawei
Thang Trang
Hi Tang,
Sorry for not explain the version clearly, the QEMU is implemented based on John Hauser's document https://www.jhauser.us/RISCV/ext-P/
And RISC-V P extension specification at github https://github.com/riscv/riscv-p-spec is also base form John Hauser's document.
The encoding and description are the same but github version is using ascii for review.
BR,
Jiawei
Thang Trang
Hi Jiawei, hi everyone,
Following the previous discussion, I am trying to build a RISC-V GNU toolchain with P-extension (Packed SIMD) support for small experiments.
However, the build fails during the GCC stage with an internal compiler error.
Error
<built-in>: internal compiler error: in c_builtin_function, at c/c-decl.cc:4916
0x2f82966 internal_error(char const*, ...)
make[2]: *** [gcc/c/Make-lang.in:152: s-selftest-c] Error 1
make[1]: *** [Makefile:4713: all-gcc] Error 2
make: *** [Makefile:654: stamps/build-gcc-newlib-stage1] Error 2
Host system
OS: Ubuntu 22.04.5 LTS (jammy)
Kernel: Linux 6.8.0-101-generic
Architecture: x86_64
Host compiler:
gcc 11.4.0 (Ubuntu 11.4.0-1ubuntu1~22.04.3)
g++ 11.4.0
P-extension repositories used
According to the README of the RISC-V P-extension specification:
P-extension spec: https://github.com/riscv/riscv-p-spec
Toolchain components used:
GCC (p-dev branch) v0.18 gcc:https://github.com/ruyisdk/riscv-gcc/tree/p-dev
Binutils (p-dev branch) v0.18 binutils: https://github.com/ruyisdk/riscv-binutils/tree/p-dev
GNU toolchain repositories tested
I tried several toolchain bases:
git clone https://github.com/riscv-collab/riscv-gnu-toolchain.git
git clone https://github.com/TelGome/riscv-gnu-toolchain.git
git clone https://github.com/pz9115/riscv-gnu-toolchain.git
Configure command
../configure \
--prefix=/home/thang/Workspace/01_Verify/tools/riscv-p-toolchain2 \
--with-arch=rv32im \
--with-abi=ilp32 \
--with-gcc-src=$(pwd)/../riscv-gcc-p \
--with-binutils-src=$(pwd)/../riscv-binutils-p
I also tried:
--with-arch=rv32imp
Build command
make -j3 --output-sync=target 2>&1 | tee build.log
Questions
- Is the gcc-p-dev repository still compatible with current riscv-gnu-toolchain?
- Does the P-extension require a specific GCC version or toolchain fork?
- Has anyone successfully built a toolchain supporting rv32imp recently?
- Could this internal compiler error be caused by version mismatch between gcc-p-dev and the current toolchain?
Any guidance or references would be greatly appreciated.
Best regards,
Thang
Thang Trang
Hi Paul,
Thank you for the suggestion.
I will try rebuilding the toolchain using a newer host compiler (e.g., GCC 13 or newer) and see if the issue persists. I’ll report back with the results.
Best regards,
Thang
ICE is bad, of course, but GCC 11 is pretty old. (Even 11.4 is almost 3 years old.)
Can you try a newer toolchain?
From: sw-...@groups.riscv.org <sw-...@groups.riscv.org> on behalf of Thang Trang <trangt...@gmail.com>
Sent: Wednesday, March 11, 2026 12:02 PM
Cc: Thang Trang <trangt...@gmail.com>; RISC-V SW Dev <sw-...@groups.riscv.org>; Jiawei <jia...@iscas.ac.cn>
Subject: Re: [sw-dev] Question about experimenting with RISC-V P extension (toolchain / simulator)WARNING: This email originated from outside of Qualcomm. Please be wary of any links or attachments, and do not enable macros.
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Thang Trang
Hi Jiawei,
Thank you very much for your pointers.
I will try building the toolchain on a newer Ubuntu version with a newer GCC and will update you with the results.
Best regards,
Thang
Hi Tang,
Currently P-ext is not available in gcc release version, you can use the developing branch to have a try.Just use the offical riscv-gnu-toolchain repo and checkout gcc and binutils into dev branch.
v0.18 gcc:https://github.com/ruyisdk/riscv-gcc/tree/p-dev
v0.18 binutils: https://github.com/ruyisdk/riscv-binutils/tree/p-dev
LLVM is also supported in serval PR:
https://github.com/llvm/llvm-project/pull/181115/
to enable P-ext, just use -march option like -march=rv64gcp
Best,
Jiawei
Paul Clarke
Sent: Wednesday, March 11, 2026 12:02 PM
Subject: Re: [sw-dev] Question about experimenting with RISC-V P extension (toolchain / simulator)
WARNING: This email originated from outside of Qualcomm. Please be wary of any links or attachments, and do not enable macros.
Hi Jiawei, hi everyone,
Tommy Murphy
Thang Trang
Hi everyone,
In host GCC version:
gcc (Ubuntu 13.3.0-6ubuntu2~24.04.1) 13.3.0
riscv-gnu-toolchain (official repository)
├── gcc (p-dev branch)
└── binutils (p-dev branch)
I was able to successfully build the GNU toolchain for rv64gcp with the following configuration:
../configure --prefix=/home/thang/Workspace/01_Verify/tools/toolchain-rv64gcp --with-arch=rv64gcp --with-abi=lp64
thang@thang:~/Workspace/01_Verify/tools/toolchain-rv64gcp/bin$ ls
riscv64-unknown-elf-addr2line riscv64-unknown-elf-gdb
riscv64-unknown-elf-ar riscv64-unknown-elf-gdb-add-index
riscv64-unknown-elf-as riscv64-unknown-elf-gprof
riscv64-unknown-elf-c++ riscv64-unknown-elf-gstack
riscv64-unknown-elf-c++filt riscv64-unknown-elf-ld
riscv64-unknown-elf-cpp riscv64-unknown-elf-ld.bfd
riscv64-unknown-elf-elfedit riscv64-unknown-elf-lto-dump
riscv64-unknown-elf-g++ riscv64-unknown-elf-nm
riscv64-unknown-elf-gcc riscv64-unknown-elf-objcopy
riscv64-unknown-elf-gcc-16.0.0 riscv64-unknown-elf-objdump
riscv64-unknown-elf-gcc-ar riscv64-unknown-elf-ranlib
riscv64-unknown-elf-gcc-nm riscv64-unknown-elf-readelf
riscv64-unknown-elf-gcc-ranlib riscv64-unknown-elf-run
riscv64-unknown-elf-gcov riscv64-unknown-elf-size
riscv64-unknown-elf-gcov-dump riscv64-unknown-elf-strings
riscv64-unknown-elf-gcov-tool riscv64-unknown-elf-strip
However, when I try to build toolchains for RV32 architectures, the build always fails with the same error:
<built-in>: internal compiler error: in c_builtin_function, at c/c-decl.cc:4916
0x2ef39c6 internal_error(char const*, ...)
For example, I tried:
../configure --prefix=/home/thang/Workspace/01_Verify/tools/toolchain-rv32ip --with-arch=rv32ip --with-abi=ilp32
../configure --prefix=/home/thang/Workspace/01_Verify/tools/toolchain-rv32imp --with-arch=rv32imp --with-abi= ilp32d
../configure --prefix=/home/thang/Workspace/01_Verify/tools/toolchain-rv32gcp --with-arch=rv32gcp --with-abi= ilp32d
../configure \
--prefix=/home/thang/Workspace/01_Verify/tools/toolchain-rv32imp \
--with-arch=rv32imacp \
--with-abi=ilp32.
My target architecture is rv32imp.
Interestingly, after building the rv64gcp toolchain successfully, I can still compile code for rv32 using:
iscv64-unknown-elf-gcc \
-nostdlib \
-march=rv32imp \
-mabi=ilp32 \
It produces the following error:
<built-in>: internal compiler error: in c_builtin_function, at
c/c-decl.cc:4916.
However, building a dedicated RV32 toolchain always fails with the internal compiler error shown above.
Does anyone know why the toolchain build succeeds for rv64gcp but fails for RV32 architectures?
Any suggestions would be appreciated.
Best regards,
Thang
Thang Trang
Hi everyone,
I understand that GCC for the P-extension currently has build issues and will be fixed later. So I switched to LLVM and built it successfully.
It works and I can compile test.S into test.elf with P-extension instructions.
80000000 <_start>:
80000000: 010205b7 lui a1,
0x1020
80000004: 30458593 addi a1,
a1, 0x304
80000008: 05060637 lui a2,
0x5060
8000000c: 70860613 addi a2, a2, 0x708
80000010: 84c5853b padd.b a0, a1, a2
80000014: 80c582bb padd.h t0, a1, a2
80000018: c4b6033b psub.b t1, a2, a1
8000001c: c0b603bb psub.h t2, a2, a1
80000020: 00550513 addi a0, a0, 0x5
80000024: 00f5f593 andi a1, a1, 0xf
80000028: 00628e33 add t3, t0, t1
8000002c: 41c38eb3 sub t4, t2, t3
80000030: 03de0f33 mul t5, t3, t4
80000034 <loop>:
80000034: 0000006f j 0x80000034 <loop>
However, when I build QEMU using the following branch:
$ git clone https://github.com/mollybuild/qemu.git -b dev-p-018
$ cd qemu
$ mkdir build && cd build
$ ../configure --prefix=/home/thang/Workspace/01_Verify/tools/qemu --target-list=riscv32-softmmu --enable-debug
$ qemu-system-riscv32 -cpu help
Available CPUs:
lowrisc-ibex
max
rv32
rv32e
rv32i
sifive-e31
sifive-e34
sifive-u34
It does not appear to support the P-extension, so I cannot run test.elf. Does anyone know why?
Thank you for your time. Any suggestions would be appreciated.
Best regards,
Thang