adding instruction in riscv32_gcc_toolchain

[Eman Mohamed]

hello, I need to add "mov" instruction as a custom instruction in riscv32_gcc_toolchain and its functionality is takes the value in the register rs2 and saves it in rd ,how can i do this and which files i need to modify ,can you give me  a guide or method to do this

[Jin Ma]

> hello, I need to add "mov" instruction as a custom instruction in riscv32_gcc_toolchain and its functionality is takes the value in the register rs2 and saves it in rd ,how can i do this and which files i need to modify ,can you give me a guide or method to do this

hi, Here are some simple suggestions：
1、The easiest way is to add your pattern in riscv.md, for example:
(define_insn "mov_rv32"
[(set (match_operand:SI 0 "=r")
(match_operand:SI 1 " r"))]
""
"mov\trd,rs2"
)
You may need to add some conditions to let the match pattern select your mov instead of the original one.
For details, please refer to the machine descriptions in the gcc manual.
https://gcc.gnu.org/onlinedocs/gccint/Machine-Desc.html

2、Add support for your mov in binutils for assembly and disassembly.

3、If you don't have hardware and use an emulator instead, you may need to add support in qemu or other emulators.

[Richard Herveille]

Isn’t mov a pseudo instruction similar to “or rd,r0,rs2”?

Richard

> On Jun 13, 2023, at 21:21, Jin Ma <ji...@linux.alibaba.com> wrote:
>
> 

> --
> You received this message because you are subscribed to the Google Groups "RISC-V SW Dev" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to sw-dev+un...@groups.riscv.org.
> To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/4c66e836-fd9b-48fb-beff-fa855532e775.jinma%40linux.alibaba.com.

[Tommy Murphy]

> I need to add "mov" instruction as a custom instruction in riscv32_gcc_toolchain 

If you search the issues (including the closed ones) here for something like "add new instruction" or "add custom instruction" you'll find some useful info/pointers.

* https://github.com/riscv-collab/riscv-gnu-toolchain/issues

* https://github.com/riscv-collab/riscv-gcc/issues

 

---

From: Richard Herveille <richard....@roalogic.com>
Sent: Wednesday, June 14, 2023 7:24:51 AM
To: Jin Ma <ji...@linux.alibaba.com>
Cc: RISC-V SW Dev <sw-...@groups.riscv.org>; Eman Mohamed <emanka...@gmail.com>
Subject: Re: [sw-dev] adding instruction in riscv32_gcc_toolchain

 

To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/BD604F8A-FA88-49F0-8AFA-C0712E3DB2DC%40roalogic.com.

[Tommy Murphy]

Isn’t mov a pseudo instruction similar to “or rd,r0,rs2”?

Not only that - but doesn't the toolchain already recognise the `mv` pseudo instruction?

https://riscvasm.lucasteske.dev

[Tommy Murphy]

FWIW - `mv` seems to be an alias for `addi rd, rs, 0`

https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md#:~:text=mv%20rd%2C%20rs,Copy%20register

[Eman Mohamed]

yes, i know that riscv already supports the mv but i am doing a project for optimizing the riscv so i want to make mov but without being alias for addi (without converting to addi)

[Eman Mohamed]

i want the mov not to be as the existed one as i don't want it to be converted to addi , so is what you mentioned here enough? also what do you mean by adding support for assembly and disassembly ?do you mean by modifying riscv-opc.c and riscv-opc.h putting op-code, match, mask is that everything

[Tommy Murphy]

On Wednesday, 14 June 2023 at 16:46:22 UTC+1 emanka...@gmail.com wrote:

yes, i know that riscv already supports the mv but i am doing a project for optimizing the riscv so i want to make mov but without being alias for addi (without converting to addi)

You might want to take cognigzance of this:

* https://groups.google.com/a/groups.riscv.org/g/hw-dev/c/eHxJKfupESA/m/4XSh4PyHAAAJ

 

[Eman Mohamed]

thanks a lot for your response ,but i have a task to make mov but without being a pseudo instruction can this be done?

[Tommy Murphy]

> can this be done

Yes - I and others have already given you pointers on where to look for details on how to add custom instructions to the GCC toolchain.

The GCC and binutils forums would arguably be more appropriate forums for questions about this.

[Eman Mohamed]

ok sorry for bothering just a last question i am trying to add push instruction so i added this in riscv-opc.c {"push", 0,  INSN_CLASS_I,"",MATCH_PUSH,MASK_PUSH,match_opcode,0}, and i added these in riscv-opc.h #define MATCH_PUSH  0x60
#define MASK_PUSH 0x707f  DECLARE_INSN(push,MATCH_PUSH,MASK_PUSH) then      i ran first  ./configure --prefix=/home/eman/RISCV-installed-Tools --with-arch=rv32i_zicsr --with-abi=ilp32
and it ran without any problems then i ran sudo make clean then sudo make and it gives me the following error    make[6]: Entering directory '/home/eman/riscv32_toolchain/build-newlib/riscv32-unknown-elf/newlib/libc'
rm -f libc.a rm -rf tmp mkdir tmp cd tmp; \ for i in argz/lib.a stdlib/lib.a ctype/lib.a search/lib.a stdio/lib.a string/lib.a signal/lib.a time/lib.a locale/lib.a reent/lib.a errno/lib.a misc/lib.a ssp/lib.a syscalls/lib.a machine/lib.a ; do \ riscv32-unknown-elf-ar x ../$i; \ done; \ riscv32-unknown-elf-ar rc ../libc.a *.o riscv32-unknown-elf-ar: ../argz/lib.a: No such file or directory riscv32-unknown-elf-ar: ../stdlib/lib.a: No such file or directory riscv32-unknown-elf-ar: ../ctype/lib.a: No such file or directory riscv32-unknown-elf-ar: ../search/lib.a: No such file or directory riscv32-unknown-elf-ar: ../stdio/lib.a: No such file or directory riscv32-unknown-elf-ar: ../string/lib.a: No such file or directory riscv32-unknown-elf-ar: ../signal/lib.a: No such file or directory riscv32-unknown-elf-ar: ../time/lib.a: No such file or directory riscv32-unknown-elf-ar: ../locale/lib.a: No such file or directory riscv32-unknown-elf-ar: ../reent/lib.a: No such file or directory riscv32-unknown-elf-ar: ../errno/lib.a: No such file or directory riscv32-unknown-elf-ar: ../misc/lib.a: No such file or directory riscv32-unknown-elf-ar: ../ssp/lib.a: No such file or directory riscv32-unknown-elf-ar: ../syscalls/lib.a: No such file or directory riscv32-unknown-elf-ar: ../machine/lib.a: No such file or directory riscv32-unknown-elf-ar: *.o: No such file or directory make[6]: *** [Makefile:1034: libc.a] Error 1 make[6]: Leaving directory '/home/eman/riscv32_toolchain/build-newlib/riscv32-unknown-elf/newlib/libc' make[5]: *** [Makefile:683: all-recursive] Error 1 make[5]: Leaving directory '/home/eman/riscv32_toolchain/build-newlib/riscv32-unknown-elf/newlib/libc' make[4]: *** [Makefile:641: all-recursive] Error 1 make[4]: Leaving directory '/home/eman/riscv32_toolchain/build-newlib/riscv32-unknown-elf/newlib' make[3]: *** [Makefile:452: all] Error 2 make[3]: Leaving directory '/home/eman/riscv32_toolchain/build-newlib/riscv32-unknown-elf/newlib' make[2]: *** [Makefile:8492: all-target-newlib] Error 2 make[2]: Leaving directory '/home/eman/riscv32_toolchain/build-newlib' make[1]: *** [Makefile:879: all] Error 2 make[1]: Leaving directory '/home/eman/riscv32_toolchain/build-newlib' make: *** [Makefile:606: stamps/build-newlib] Error 2

[Eman Mohamed]

hello, first i want to thank you for your reply but i want to ask you aabout SI what this indicates and if i want to make an immediate instruction with operands rd,<immediate> then how can i modify the md file to support this

thanks a lot i appreciate your help

On Wednesday, 14 June 2023 at 07:21:37 UTC+3 ji...@linux.alibaba.com wrote: