Specifying rounding modes for floating point operations

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Alex Bradbury

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Nov 1, 2017, 5:14:34 AM11/1/17
to RISC-V SW Dev
I note that the current GNU assembler accepts a rounding mode argument
for a subset of the floating point operations - at least operations
like fcvt.w.s, but seems to be missing support for specifying an
rounding mode for operations like fadd.s

e.g.:
fcvt.w.s a5,fa5,rtz

It's obviously a bug/unimplemented feature that rounding modes can't
be specified in a similar way for other operations like fadd. Before
pursuing that, I wanted to ask about this style of specifying the
rounding mode. Wouldn't it be more consistent with the approach taken
elsewhere (e.g. the AMOs and .aq/.rl/.aqrl) to have the rounding mode
appended to the opcode? e.g. just like we have amoadd.w.aq or lr.w.rl
we might support fadd.s.rtz or fmadd.d.rdn

Best,

Alex

Andrew Waterman

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Nov 1, 2017, 5:36:44 AM11/1/17
to Alex Bradbury, RISC-V SW Dev
GAS does support this (and it has for many years, so maybe something
else is afoot on your end).

$ cat test.s
fadd.s ft0, ft1, ft2, rtz
fmul.s ft0, ft1, ft2, rdn
fmadd.s ft0, ft1, ft2, ft3, rup
$ riscv64-unknown-linux-gnu-as test.s
$ riscv64-unknown-linux-gnu-objdump -d a.out
...
0: 00209053 fadd.s ft0,ft1,ft2,rtz
4: 1020a053 fmul.s ft0,ft1,ft2,rdn
8: 1820b043 fmadd.s ft0,ft1,ft2,ft3,rup

We're not interested in revisiting the way it's expressed in the
assembler, even though we agree that the FP rounding encoding matches
in spirit the AMO encoding.
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Alex Bradbury

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Nov 1, 2017, 6:09:47 AM11/1/17
to Andrew Waterman, RISC-V SW Dev
On 1 November 2017 at 09:36, Andrew Waterman <wate...@eecs.berkeley.edu> wrote:
> GAS does support this (and it has for many years, so maybe something
> else is afoot on your end).

My mistake, it seems like something else was afoot at my end.

> $ cat test.s
> fadd.s ft0, ft1, ft2, rtz
> fmul.s ft0, ft1, ft2, rdn
> fmadd.s ft0, ft1, ft2, ft3, rup
> $ riscv64-unknown-linux-gnu-as test.s
> $ riscv64-unknown-linux-gnu-objdump -d a.out
> ...
> 0: 00209053 fadd.s ft0,ft1,ft2,rtz
> 4: 1020a053 fmul.s ft0,ft1,ft2,rdn
> 8: 1820b043 fmadd.s ft0,ft1,ft2,ft3,rup
>
> We're not interested in revisiting the way it's expressed in the
> assembler, even though we agree that the FP rounding encoding matches
> in spirit the AMO encoding.

That's a real shame.

Anyway, I've created PRs to document the DYN mnemonic that seems to be
accepted by the tools
https://github.com/riscv/riscv-isa-manual/pull/111 and to document
this way of specifying rounding modes
https://github.com/riscv/riscv-asm-manual/pull/3

Alex
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