Python compiler toolchain with RISC-V backend

[Michg]

Hello RISC-V community,
I would like to inform about the ppci-project. It is a compiler toolchain, which includes compiler, assembler, linker and a build system. It is entirely written in python.
It has a  c-like frontend called c3 and supports different backends like x86_64, arm, riscv,.. for which it can generate machine code. There is no dependency to
GCC, binutils or LLVM. It includes examples for the different targets. For RISC-V are two examples with  existing 32-Bit verilog RISC-V processor implementations included
(iverilog simulation (https://github.com/steveicarus/iverilog) for picorv32 from https://github.com/cliffordwolf/picorv32 and verilator simulation (http://www.veripool.org/wiki/verilator)
for pulpino from https://github.com/pulp-platform/pulpino). The examples are known to work, but the project is in alpha status and not ready for production use.
The project can be found under:
https://bitbucket.org/windel/ppci
The author of ppci is Windel Bouwman, the RISC-V backend is contributed by me.
Usage, feedback, contribution are welcome (with increasing appreciation).
Michael

[Samuel Falvo II]

On Wed, Jul 20, 2016 at 1:40 PM, Michg <michae...@gmx.de> wrote:
> GCC, binutils or LLVM. It includes examples for the different targets. For
> RISC-V are two examples with existing 32-Bit verilog RISC-V processor
> implementations included

How easy would it be to make the project support 64-bit RISC-V as
well? I'm building a homebrew computer around my own RV64IS
instruction set implementation, and I'm always looking for ways to
either improve my own productivity, or make it more appealing to other
folks, particularly if the toolchain used is not beholden to a Linux
runtime environment.

Thanks!

--
Samuel A. Falvo II

[Mike Frysinger]

llvm/gcc are not beholden to a Linux runtime

-mike

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[Samuel Falvo II]

On Wed, Jul 20, 2016 at 11:09 PM, Mike Frysinger <vap...@gmail.com> wrote:
> llvm/gcc are not beholden to a Linux runtime
> -mike

Technically you're right, but it *SURE* is easier to get running on
Linux than on other platforms in my experience, to the point that I
won't consider undertaking the exercise on anything but Linux.

If these tools just rely on Python, then (some day), installing them
would be as simple as installing a PyPI package and I don't have to
worry about Windows, Linux, MacOS X, or if Python is ported to
Kestrel, even Kestrel binaries need to be installed.

[Michg]

How easy would it be to make the project support 64-bit RISC-V as
well?  I'm building a homebrew computer around my own RV64IS
instruction set implementation, and I'm always looking for ways to
either improve my own productivity, or make it more appealing to other

folks, particularly if the toolchain used is not beholden to a Linux
runtime environment.

 

The current riscv-backend supports only 32-bit(also rvc), but it should be straightforward to add 64-bit to the existing code.
Very helpful will surely be to have a working environment for testing (a proven simulation or a cpu core).
Regarding the portability, ppci is tested on windows and linux. The examples depend on non python code like the simulators,
which are specific for the platform. Nevertheless the riscv-examples also have been successful run on windows and linux.
Michael