Interrupt attribute on functions in gcc

[peter.ashenden]

Hi folks,

I see that some gcc targets support an interrupt attribute on a function declaration in C to indicate the function should have prolog and epilog code suitable for an interrupt handler. Has this been done for the RISC-V target, or is it planned? I couldn't find it in the source code, but maybe I was not looking in the right place. Thanks for any pointers.

Cheers,

PA

[Tommy Murphy]

Did you try compiling a function with and without the interrupt attribute to compare the generated assembly code?

[Peter Ashenden]

Yes, I did try it. The compiler issued a warning, "attribute directive ignored", and generated code as normal:

timer.c:27:1: warning: 'interrupt' attribute directive ignored [-Wattributes]
 void __attribute__ ((interrupt)) timer_isr() {
 ^~~~

Since I couldn't find any docs on RISC-V target attributes, I guessed that it would follow the MIPS interrupt attribute. If that's not the case, what should it be, and is it documented? Many thanks.

Cheers,

PA

On 11/04/2017 08:46, Tommy Murphy wrote:

Did you try compiling a function with and without the interrupt attribute to compare the generated assembly code?

--
You received this message because you are subscribed to the Google Groups "RISC-V SW Dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email to sw-dev+un...@groups.riscv.org.
To post to this group, send email to sw-...@groups.riscv.org.
Visit this group at https://groups.google.com/a/groups.riscv.org/group/sw-dev/.
To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/b5d0fd66-ac6d-4440-b0fe-6880663c04b9%40groups.riscv.org.

-- 
Peter Ashenden, CTO IC Design, ASTC

[Tommy Murphy]

OK - my guess is that they are not yet supported by the RISC-V tools but I don't know for sure.

[Bruce Hoult]

On Tue, Apr 11, 2017 at 2:26 AM, Peter Ashenden <peter.a...@astc-design.com> wrote:

Yes, I did try it. The compiler issued a warning, "attribute directive ignored", and generated code as normal:

timer.c:27:1: warning: 'interrupt' attribute directive ignored [-Wattributes]
 void __attribute__ ((interrupt)) timer_isr() {
 ^~~~

Since I couldn't find any docs on RISC-V target attributes, I guessed that it would follow the MIPS interrupt attribute. If that's not the case, what should it be, and is it documented? Many thanks.

It's pretty simple, in general: argument registers and temporary registers have to be treated the same as s registers ... save/restore them if you want to use them -- or if you call any other standard functions that will assume they'll allowed to clobber them.

I guess a few other wrinkles, such as not being able to assume that gp and tp have meaningful values but, again, if you call any standard functions they'll assume that they do.

[Peter Ashenden]

Thanks Bruce. I understand that's what the compiler must generate for an interrupt routine. My question is whether it's implemented in RISC-V gcc yet or not.

Cheers,

PA

[Kito Cheng]

RISC-V GCC not implement yet

> --
> You received this message because you are subscribed to the Google Groups
> "RISC-V SW Dev" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to sw-dev+un...@groups.riscv.org.
> To post to this group, send email to sw-...@groups.riscv.org.
> Visit this group at
> https://groups.google.com/a/groups.riscv.org/group/sw-dev/.
> To view this discussion on the web visit

> https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/d818380d-03b7-3b83-3e9d-45aba5863b93%40astc-design.com.

[Peter Ashenden]

[Tommy Murphy]

Anybody know if __interrupt__ has been implemented for RISC-V since this thread was last updated?

Thanks.

[Jim Wilson]

On Fri, May 11, 2018 at 7:53 AM, Tommy Murphy <tommy_...@hotmail.com> wrote:
> Anybody know if __interrupt__ has been implemented for RISC-V since this
> thread was last updated?

I have a prototype, but the spec for what __interrupt__ should do
keeps changing every month, as it is now tied into the faster
interrupt handling proposal, and the RV32E/microcontroller-EABI
discussion.

Jim

[Tommy Murphy]

Thanks a lot for the update Jim.