RISC-V Priviledge Registers

[rithvik kumar]

Hi everyone,
When there is shift from machine mode to user or supervisor priviledge mode , does each priviledge have their own set of general purpose register like ARM architecture or each priviledge mode use the same set of registers like stack pointer,base pointer etc.

If all the priviledges are using same set of registers wouldnt it corrupt the register values, how is it overcomed ?
if possible can anyone share documents related to it.

Thank you

[Tommy Murphy]

Sounds like a similar question to this one?

* https://groups.google.com/a/groups.riscv.org/g/isa-dev/c/4vCeXiWUrsk

> If all the priviledges are using same set of registers wouldnt it corrupt the register values, how is it overcomed ?

The OS will presumably deal with saving and restoring registers as needed.

The general approach will be similar to or the same as any register save/restore mechanism for interrupts, exceptions, threads etc.