Help enabling supervisor interrupts

[Xavier Barreto Tomeo]

Hi! 

I am in the last days of my project, and I'm trying to implement supervisor interrupts, more exactly time interrupt in supervisor level. I have this code that has everything that should make it work, but it seems it doesn't.

Can someone help me please? I am almost near the time to submit my project. It doesn't work propertly I dont know what to do more!

.section .text.init

.global _entry

_entry:

la sp, stack0

li a2, 1024*4 #definim tamany de pagina a 4096

csrr a1, mhartid

addi a1, a1, 1 # 0 + 1

mul a0, a2, a1 #a1 de normal sera 0, pq es el proces 0 el que fa el boot ja que nomes tenim un core teoricament (4096*1)

add sp, sp, a0 #el punter apunta al bottom del stack

li a0, 0x0000000000000000 # desactivem la paginacio per ara

csrw satp, a0

csrr a0, mstatus # Read mstatus

li a1, 0xFFFFFFFFFFFFF3FF # Mask to clear MPP bits

and a0, a0, a1 # Clear MPP bits

li a1, 0x0000000000001802 # Set MPP to supervisor mode (01)

or a0, a0, a1 # Set MPP bits to 01 (supervisor mode)

csrw mstatus, a0 # Write back to mstatus

li a0, 0x3fffffffffffff //aixo vol dir totes les direcions de memoria posibles

csrw pmpaddr0, a0 //escribim pq formin part del grup 0

li a0, 0x0f //li donem els permisos f aka NAPOT RWX

csrw pmpcfg0, a0

la t0, start_kernel

csrw mepc, t0 #li diem on vol que salti al mret

#definim la delegacio d'interrupcions i excepcions ara pq despres no es poden tocar els registres m

li t0, 0xa0 #1010 0 MTIE = 1

csrs mie, t0

li a0, 0xffff

csrw mideleg, a0

li a0, 0xffff

csrw medeleg, a0

li t0, 0x222 # STIE (Supervisor Timer Interrupt Enable)

csrs sie, t0

la t0, interrupt_handler

csrw stvec, t0

li t0, 1000000

li t1, 0x2004000 #mtimecmp address

sd t0, 0(t1)

mret

Thank you in advice!

[Tommy Murphy]

Maybe look at existing resources on this issue such as...

* https://danielmangum.com/posts/risc-v-bytes-timer-interrupts/

* https://www.reddit.com/r/RISCV/comments/10xhhh5/periodic_supervisor_timer_interrupt/

* https://stackoverflow.com/questions/77243164/some-question-about-machine-timer-interrupt-and-supervisor-timer-interrupt-in-ri

And maybe also look at what OpenSBI (and/or the Linux kernel itself?) does in this context as it may help to clarify issues.