Groups keyboard shortcuts have been updated
Dismiss
See shortcuts

Porting latest kernel version for RISC-V (RV64IMAFD) target

1,008 views
Skip to first unread message

Billa Surendra

unread,
Aug 18, 2022, 8:49:59 AM8/18/22
to RISC-V SW Dev
Dear All,

I am unable to port Linux kernel-5.19.6 to the RISC-V (RV64IMAFD) target. I have generated a cross compiler with arch=rv64imafd and abi=lp64d flags. Cross compiled sample program and checked, generated binary does not have compressed instructions.

I tried compiling linux-5.19.6 with a cross compiler but no luck. In Between I have  checked the .config file, C model is enabled (CONFIG_RISCV_ISA_C=y), Tried disabling but after running make menuconfig again it is enabled. Even not possible to disable with the help of make menuconfig.
Here I am attaching screenshots for reference.

Please advise me The following things
1. how to port the linux kernel to rv64imafd ?.
2. Any specific linux kernel version will support for rv64imafd ?.

I am really struck by this. Please help me.

Thank you
Billa

Screenshot from 2022-08-18 17-50-52.png
Screenshot from 2022-08-18 18-16-02.png

Tommy Murphy

unread,
Aug 18, 2022, 10:05:28 AM8/18/22
to Billa Surendra, RISC-V SW Dev
You were already given advice on this issue here!


I really don't understand why you're cross posting it to the mailing list when the issue is already fully understood and explained and you have already been given useful advice.

kito-cheng's most recent comment in the issue is the correct way to proceed - i.e. ask on the Linux mailing list if the compressed instruction can/should be replaced by, say, .ascii "MZ".

Christoph Müllner

unread,
Aug 18, 2022, 10:30:30 AM8/18/22
to Billa Surendra, RISC-V SW Dev
Hi Billa,

CONFIG_RISCV_ISA_C can be disabled by the following steps:

1) Enable CONFIG_NONPORTABLE
2) Disable CONFIG_EFI
3) Disable CONFIG_RISCV_ISA_C

In case you depend on CONFIG_EFI you are out of luck because EFI support currently requires CONFIG_RISCV_ISA_C.

BR
Christoph


--
You received this message because you are subscribed to the Google Groups "RISC-V SW Dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email to sw-dev+un...@groups.riscv.org.
To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/CAKBF_5rmVcFS0Ji1hwHAq%2BjpEoasXBoG3e%3DEBpM4JbXdpbQ6Og%40mail.gmail.com.

Billa Surendra

unread,
Aug 18, 2022, 10:48:07 AM8/18/22
to Tommy Murphy, RISC-V SW Dev
Sorry for reposting. I have subscribed to riscv Linux but i am not getting response from group. My issue not resolved yet, Linux compiled successfully but when I am installing module there i am getting error.

Billa Surendra

unread,
Aug 18, 2022, 10:55:40 AM8/18/22
to Tommy Murphy, RISC-V SW Dev
root@fedora linux-5.16.9]# ${LJOS}/cross-tools/bin/depmod.pl \
-F ${LJOS}/boot/System.map-5.16.9 \
-b ${LJOS}/lib/modules/5.16.9

Error:

unresolved symbol printk in file /lib/modules/5.16.9/kernel/fs/efivarfs/efivarfs.ko

Billa Surendra

unread,
Aug 18, 2022, 10:57:52 AM8/18/22
to Christoph Müllner, RISC-V SW Dev
I will try this approach and let you know.

Tommy Murphy

unread,
Aug 18, 2022, 11:36:08 AM8/18/22
to Christoph Müllner, Billa Surendra, RISC-V SW Dev
Hi Christoph

> In case you depend on CONFIG_EFI you are out of luck because EFI support currently requires CONFIG_RISCV_ISA_C.

But does it actually need to?
Is this compressed instruction 


actually needed or is it just a way to encode "MZ" that might be better done using, say, .ascii "MZ" thus decoupling the kernel from requiring the C compressed extension (assuming that compressed instructions are not needed elsewhere?)?


Tommy Murphy

unread,
Aug 18, 2022, 11:49:57 AM8/18/22
to Billa Surendra, RISC-V SW Dev
There's far too little info/context here for anybody to be able to comment with any accuracy. You don't clarify what exactly you're trying to compile and how, no full build log attached etc.

Christoph Müllner

unread,
Aug 18, 2022, 12:12:16 PM8/18/22
to Tommy Murphy, Billa Surendra, RISC-V SW Dev
The way the "MZ" is written in the source code is irrelevant (can be instructions, .long, .ascii etc).
The question is if the resulting bytes get interpreted as instructions.
And according to the documentation in the kernel, this is the case ("Executable code"):

BR
Christoph

 

Tommy Murphy

unread,
Aug 18, 2022, 12:28:16 PM8/18/22
to Christoph Müllner, Billa Surendra, RISC-V SW Dev
Thanks Christoph.

I think I get it now...

However the "MX" is encoded, it will always be executed as the first (compressed) instruction of _start and it's not possible to have a preceding jump to skip it because it's actually "header" metadata.

So, the EFI enabled kernel does explicitly rely on the C compressed extension being implemented.

Therefore, as mentioned in the issue thread, the only way to compile the kernel for rvXXimafd without the C extension is to configure it so that the EFI mechanism is disabled.

This all assumes that the kernel doesn't depend on compressed instructions elsewhere which seems to be the case at the moment at least.

Thanks a lot for helping to clarify.

:-)

From: Christoph Müllner <christoph...@vrull.eu>
Sent: Thursday, August 18, 2022 5:12:02 PM
To: Tommy Murphy <tommy_...@hotmail.com>
Cc: Billa Surendra <billa.i...@gmail.com>; RISC-V SW Dev <sw-...@groups.riscv.org>
Subject: Re: [sw-dev] Porting latest kernel version for RISC-V (RV64IMAFD) target
 

Tommy Murphy

unread,
Aug 18, 2022, 1:05:19 PM8/18/22
to Christoph Müllner, Billa Surendra, RISC-V SW Dev
> However the "MX" is encoded ...

Oops. I obviously meant "MZ".

Anyway, this is a useful discussion relating to how we ended up with the c.li s4, -13 compressed instruction and concomitant dependency on the C extension when EFI capability is enabled. :-)


Palmer Dabbelt

unread,
Aug 18, 2022, 3:26:21 PM8/18/22
to tommy_...@hotmail.com, christoph...@vrull.eu, billa.i...@gmail.com, sw-...@groups.riscv.org
IIRC there's another discussion about this on LKML, but one key bit here
is that it's not actually EFI that requires the C extension, it's the
combination of EFI and Image: EFI needs the MZ prefix for PE/COFF, and
Image needs to be executable from the start. We've encoded this as "EFI
needs C" in the Kconfig entries, but that's only because Image was the
default format at the time so it was implicitly enabled.

There's no reason we couldn't add the Image format as a Kconfig as well,
allowing users who want EFI-only booting to work to do so. That would
of course break compatibility with systems that expect the Image format,
but there's way less obvious ways to make systems that fail to boot so I
doubt it'd be much of an issue for folks -- that kind of thing is what
NONPORTABLE is there for.

Tommy Murphy

unread,
Aug 18, 2022, 4:29:00 PM8/18/22
to Palmer Dabbelt, christoph...@vrull.eu, billa.i...@gmail.com, sw-...@groups.riscv.org
Thanks Palmer - and Christoph.
Your respective comments have clarified this specific RISC-V kernel nuance very well for me at least. :-)
Much appreciated.

Billa Surendra

unread,
Aug 19, 2022, 2:31:30 AM8/19/22
to Tommy Murphy, Palmer Dabbelt, christoph...@vrull.eu, sw-...@groups.riscv.org
How to set default configurations for riscv (rv64imafd) when we cross compile linux-5.16.9. Actually I am planning to test the riscv Linux kernel on qemu.

Billa Surendra

unread,
Aug 19, 2022, 2:38:06 AM8/19/22
to Christoph Müllner, RISC-V SW Dev
Hi Christoph,

I did disabled CONFIG_EFI and CONFIG_RISCV_ISA_C but I didn't find the CONFIG_NONPORTABLE flag in my .config file. Is it okay to disable only both of them ?. Please let me know how I can get the CONFIG_NONPORTABLE flag in my .config file.

Thanks
Billa

Christoph Müllner

unread,
Aug 19, 2022, 2:47:06 AM8/19/22
to Billa Surendra, RISC-V SW Dev
Hi Billa,

Yes, CONFIG_NONPORTABLE is not in 5.19, but is introduced later.
So you don't need to care about that for your 5.19-based kernel.

BR
Christoph

Billa Surendra

unread,
Aug 19, 2022, 4:54:10 AM8/19/22
to Christoph Müllner, RISC-V SW Dev
Thanks Christoph, Tommy murphy and everyone for helping me in porting linux-5.16.9 to riscv (rv64imafd) target. Linux kernel compiled successfully.

Thanks
Billa 

Billa Surendra

unread,
Aug 25, 2022, 5:36:15 AM8/25/22
to Christoph Müllner, RISC-V SW Dev
Hi Christoph,

Due to some reasons I have changed my riscv gcc cross compiler and again tried cross compiling Linux-5.16.9 kernel but now its giving new error message.
My old gcc cross compiler version is 11.2.0.
Present version is 10.3.1. 

Error Message:

  LDS     arch/riscv/kernel/vdso/vdso.lds
  AS      arch/riscv/kernel/vdso/rt_sigreturn.o
  CC      arch/riscv/kernel/vdso/vgettimeofday.o
./arch/riscv/include/asm/vdso/gettimeofday.h: Assembler messages:
./arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a4,0xc01'
./arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
./arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a4,0xc01'
./arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
make[1]: *** [scripts/Makefile.build:287: arch/riscv/kernel/vdso/vgettimeofday.o] Error 1
make: *** [arch/riscv/Makefile:121: vdso_prepare] Error 2

Please give me suggestion to overcome these errors.

Thanks
Billa

Tommy Murphy

unread,
Aug 25, 2022, 7:48:42 AM8/25/22
to Billa Surendra, Christoph Müllner, RISC-V SW Dev
CSR access instructions were separated out of the I (integer) base extension into the Zicsr extension at some stage. You probably need to configure the toolchain using --with-arch=rv64g_Zicsr --with-abi=lp64d and rebuild it? (I'm assuming that your target doesn't support the C compressed extension). In fact you may need --with-arch=rv64g_Zicsr_Zifencei?

Billa Surendra

unread,
Aug 25, 2022, 8:08:49 AM8/25/22
to Tommy Murphy, Christoph Müllner, RISC-V SW Dev
Sure, I will try it and let you know.

Tommy Murphy

unread,
Aug 25, 2022, 8:15:52 AM8/25/22
to Billa Surendra, Christoph Müllner, RISC-V SW Dev
Actually, before rebuilding the tools, try passing --march= rv64g_Zicsr_Zifencei --mabi=lp64d to the kernel build process just in case the Zicsr and Zicencei extension capabilities are already built into the existing toolchain and just need to be enabled by passing the appropriate architecture. However, even if they are, I suspect that the link may fail if the rv64g_Zicsr_Zfencei multilibs are used but are not available?

Billa Surendra

unread,
Sep 16, 2022, 9:00:51 AM9/16/22
to Tommy Murphy, Christoph Müllner, RISC-V SW Dev
On Thu, Aug 25, 2022 at 5:45 PM Tommy Murphy <tommy_...@hotmail.com> wrote:
Actually, before rebuilding the tools, try passing --march= rv64g_Zicsr_Zifencei --mabi=lp64d to the kernel build process just in case the Zicsr and Zicencei extension capabilities are already built into the existing toolchain and just need to be enabled by passing the appropriate architecture. However, even if they are, I suspect that the link may fail if the rv64g_Zicsr_Zfencei multilibs are used but are not available?

Tried building cross tools with  --march= rv64g_Zicsr_Zifencei --mabi=lp64d flags but I am getting errors like this in gcc compilation.

Error:
 
cho timestamp > stmp-int-hdrs
/home/demo/sources/final_sources/gcc-static/./gcc/xgcc -B/home/demo/sources/final_sources/gcc-static/./gcc/ -xc -nostdinc /dev/null -S -o /dev/null -fself-test=../../gcc-10.3.1-20210422/gcc/testsuite/selftests
cc1: error: '-march=rv64g_Zicsr_Zifencei': unsupported ISA subset 'Z'
cc1: error: requested ABI requires '-march' to subsume the 'D' extension
cc1: error: ABI requires '-march=rv64'
cc1: note: self-tests are not enabled in this build
make[1]: *** [../../gcc-10.3.1-20210422/gcc/c/Make-lang.in:124: s-selftest-c] Error 1
make[1]: *** Waiting for unfinished jobs....
rm gfdl.pod gcc.pod gcov-dump.pod gcov-tool.pod fsf-funding.pod gpl.pod cpp.pod gcov.pod lto-dump.pod
make[1]: Leaving directory '/home/demo/sources/final_sources/gcc-static/gcc'
make: *** [Makefile:4402: all-gcc] Error 2

Here I am sharing config.log. Please have a look and give me suggestions.

Thanks
Billa Surendra
 
config.log

Billa Surendra

unread,
Sep 27, 2022, 2:51:24 AM9/27/22
to Christoph Müllner, RISC-V SW Dev
Hi Everyone,

Today, I have tried cross compiling u-boot source code (https://github.com/u-boot/u-boot), but I am getting the following error. Here my cross compiler is compressed instruction disabled. After running make qemu-riscv64_smode_defconfig command I am able to see .config file, I did checked CONFIG_ISA_C is enabled then I disabled it and tried make CROSS_COMPILE=riscv64-unknown-linux-gnu- command and its giving below error. Can anyone please give me what changes I have to make in the .config file.

Error:
CC      arch/riscv/cpu/cpu.o
arch/riscv/cpu/cpu.c: Assembler messages:
arch/riscv/cpu/cpu.c:96: Error: unrecognized opcode `csrs sstatus,a5'
arch/riscv/cpu/cpu.c:97: Error: unrecognized opcode `csrw 0x003,0'
make[1]: *** [scripts/Makefile.build:258: arch/riscv/cpu/cpu.o] Error 1
make: *** [Makefile:1875: arch/riscv/cpu] Error 2

Thanks and regards
Billa Surendra

Tommy Murphy

unread,
Sep 27, 2022, 3:46:46 AM9/27/22
to Billa Surendra, Christoph Müllner, RISC-V SW Dev
> arch/riscv/cpu/cpu.c:96: Error: unrecognized opcode `csrs sstatus,a5'

This suggests to me that the toolchain does not have the zicsr extension enabled.
In the recent past this extension was included in the base I (integer) extension/ISA but it was since split out.
Where does the toolchain come from and how was it built?

Liviu Ionescu

unread,
Sep 27, 2022, 3:49:00 AM9/27/22
to Tommy Murphy, Billa Surendra, Christoph Müllner, RISC-V SW Dev


> On 27 Sep 2022, at 10:46, Tommy Murphy <tommy_...@hotmail.com> wrote:
>
> ... the toolchain does not have the zicsr extension enabled

Or the compiler was not invoked with the zicsr option explicitly mentioned.


Liviu

Billa Surendra

unread,
Sep 27, 2022, 9:22:05 AM9/27/22
to Tommy Murphy, Christoph Müllner, RISC-V SW Dev
I have built my own RISC-V toolchain with --with-arch=rv64imafd and --with-abi=lp64d flags. As you suggested I have tried building cross tools with --with-arch= rv64g_Zicsr_Zifencei --with-abi=lp64d flags but I am getting errors like this in gcc compilation. Please help me to build a toolchain with Zicsr_Zifencei support and what is the procedure to follow ?.


Error:
 
cho timestamp > stmp-int-hdrs
/home/demo/sources/final_sources/gcc-static/./gcc/xgcc -B/home/demo/sources/final_sources/gcc-static/./gcc/ -xc -nostdinc /dev/null -S -o /dev/null -fself-test=../../gcc-10.3.1-20210422/gcc/testsuite/selftests
cc1: error: '-march=rv64g_Zicsr_Zifencei': unsupported ISA subset 'Z'
cc1: error: requested ABI requires '-march' to subsume the 'D' extension
cc1: error: ABI requires '-march=rv64'
cc1: note: self-tests are not enabled in this build
make[1]: *** [../../gcc-10.3.1-20210422/gcc/c/Make-lang.in:124: s-selftest-c] Error 1
make[1]: *** Waiting for unfinished jobs....
rm gfdl.pod gcc.pod gcov-dump.pod gcov-tool.pod fsf-funding.pod gpl.pod cpp.pod gcov.pod lto-dump.pod
make[1]: Leaving directory '/home/demo/sources/final_sources/gcc-static/gcc'
make: *** [Makefile:4402: all-gcc] Error 2

Thanks
Billa Surendra




 

Tommy Murphy

unread,
Sep 27, 2022, 10:51:23 AM9/27/22
to Billa Surendra, Christoph Müllner, RISC-V SW Dev
What repo and branch are you building from?
What are your clone/pull and configure commands?
Have you tried building something later than GCC 10.3.1 which is quite old (relative to the pace of change of the RISC-V tools) at this stage?

Tommy Murphy

unread,
Sep 27, 2022, 10:54:53 AM9/27/22
to Billa Surendra, Christoph Müllner, RISC-V SW Dev
> cc1: error: '-march=rv64g_Zicsr_Zifencei': unsupported ISA subset 'Z'

Also, I'm not sure if the arch string is case sensitive and maybe needs to be ..._zicsr_zifencei? I have mentioned Zicsr etc. previously but that (uppercase 'Z') may be incorrect.

Billa Surendra

unread,
Oct 7, 2022, 2:25:49 AM10/7/22
to Tommy Murphy, Christoph Müllner, RISC-V SW Dev
On Tue, Sep 27, 2022 at 8:24 PM Tommy Murphy <tommy_...@hotmail.com> wrote:
> cc1: error: '-march=rv64g_Zicsr_Zifencei': unsupported ISA subset 'Z'

Also, I'm not sure if the arch string is case sensitive and maybe needs to be ..._zicsr_zifencei? I have mentioned Zicsr etc. previously but that (uppercase 'Z') may be incorrect.

As you suggested I tried with  -march=rv64g_zicsr_zifencei and -abi=lp64d flags. Now the error message has changed but the meaning is almost the same. Can you please have a look and give me suggestions.

Error:

checking if mkdir takes one argument... no
Traceback (most recent call last):
  File "/root/MDP/RV64G_Fedora_Distro/packages/gcc-static/gcc/../../gcc-11.2.0/gcc/config/riscv/arch-canonicalize", line 114, in <module>
    print (arch_canonicalize(arg))
  File "/root/MDP/RV64G_Fedora_Distro/packages/gcc-static/gcc/../../gcc-11.2.0/gcc/config/riscv/arch-canonicalize", line 89, in arch_canonicalize
    long_exts = list(sorted(filter(lambda x:len(x) != 1, long_exts),
  File "/root/MDP/RV64G_Fedora_Distro/packages/gcc-static/gcc/../../gcc-11.2.0/gcc/config/riscv/arch-canonicalize", line 81, in longext_sort
    raise Exception("Unsupported extension `%s`" % exts)
Exception: Unsupported extension `zicsr`
--with-abi=lp64d is not supported for ISA
make: *** [Makefile:4382: configure-gcc] Error 1


 

 

Tommy Murphy

unread,
Oct 7, 2022, 2:43:46 AM10/7/22
to Billa Surendra, Christoph Müllner, RISC-V SW Dev
> File "/root/MDP/RV64G_Fedora_Distro/packages/gcc-static/gcc/../../gcc-11.2.0/gcc/config/riscv/arch-canonicalize", line 114, in <module>
    
You're still not using the latest RISC-V GCC.
I would suggest that you should try 12.1.0.

 

Billa Surendra

unread,
Oct 7, 2022, 2:49:42 AM10/7/22
to Tommy Murphy, Christoph Müllner, RISC-V SW Dev
Sure, I will try with latest gcc version.

Billa Surendra

unread,
Oct 7, 2022, 6:26:48 AM10/7/22
to Tommy Murphy, Christoph Müllner, RISC-V SW Dev
On Fri, Oct 7, 2022 at 12:13 PM Tommy Murphy <tommy_...@hotmail.com> wrote:
> File "/root/MDP/RV64G_Fedora_Distro/packages/gcc-static/gcc/../../gcc-11.2.0/gcc/config/riscv/arch-canonicalize", line 114, in <module>
    

After changing to the latest gcc source code --with-arch=rv64g_zicsr_zifencei flag, I could successfully build the riscv toolchain and also cross compiled the latest linux kernel.

Thank you Tommy for your continuous support.

Palmer Dabbelt

unread,
Oct 7, 2022, 10:40:49 AM10/7/22
to tommy_...@hotmail.com, billa.i...@gmail.com, christoph...@vrull.eu, sw-...@groups.riscv.org
On Thu, 06 Oct 2022 23:43:41 PDT (-0700), tommy_...@hotmail.com wrote:
>> File "/root/MDP/RV64G_Fedora_Distro/packages/gcc-static/gcc/../../gcc-11.2.0/gcc/config/riscv/arch-canonicalize", line 114, in <module>
>
> You're still not using the latest RISC-V GCC.
> I would suggest that you should try 12.1.0.

There's even a 12.2 now <https://gcc.gnu.org/gcc-12/>.

>
> https://github.com/riscv-collab/riscv-gnu-toolchain/blob/c2857f9c03867f9fe9ee8e44b7cf57dd83020455/.gitmodules#L5

Tommy Murphy

unread,
Oct 7, 2022, 10:54:03 AM10/7/22
to Palmer Dabbelt, billa.i...@gmail.com, christoph...@vrull.eu, sw-...@groups.riscv.org
There's even a 12.2 now <https://gcc.gnu.org/gcc-12/>.

Tommy Murphy

unread,
Oct 7, 2022, 10:54:52 AM10/7/22
to Billa Surendra, Christoph Müllner, RISC-V SW Dev
> After changing to the latest gcc source code --with-arch=rv64g_zicsr_zifencei flag, I could successfully build the riscv toolchain and also cross compiled the latest linux kernel.
> Thank you Tommy for your continuous support.

Glad it helped.

Christoph Müllner

unread,
Oct 7, 2022, 11:09:17 AM10/7/22
to Tommy Murphy, Palmer Dabbelt, billa.i...@gmail.com, sw-...@groups.riscv.org
Hi Tommy,

The git module object itself is set to GCC 12.2 by this (merged) commit:
 
The branch entry in the .gitmodules file is less relevant.
It would only allow you to track a remote branch (e.g. git submodule update --remote).

BR
Christoph

Tommy Murphy

unread,
Oct 7, 2022, 4:10:44 PM10/7/22
to Christoph Müllner, Palmer Dabbelt, billa.i...@gmail.com, sw-...@groups.riscv.org
Thanks Christoph - would it make sense to always update .gitmodules too when bumping the submodules just to avoid confusion?

Christoph Müllner

unread,
Oct 7, 2022, 5:03:24 PM10/7/22
to Tommy Murphy, Palmer Dabbelt, billa.i...@gmail.com, sw-...@groups.riscv.org
On Fri, Oct 7, 2022 at 10:10 PM Tommy Murphy <tommy_...@hotmail.com> wrote:
Thanks Christoph - would it make sense to always update .gitmodules too when bumping the submodules just to avoid confusion?

Tommy Murphy

unread,
Oct 7, 2022, 5:33:54 PM10/7/22
to Christoph Müllner, Palmer Dabbelt, billa.i...@gmail.com, sw-...@groups.riscv.org
Thanks. :⁠-⁠)

Billa Surendra

unread,
Nov 9, 2023, 1:21:17 AM11/9/23
to Christoph Müllner, RISC-V SW Dev

On Thu, Aug 18, 2022 at 8:00 PM Christoph Müllner <christoph...@vrull.eu> wrote:
Hi Billa,

CONFIG_RISCV_ISA_C can be disabled by the following steps:

1) Enable CONFIG_NONPORTABLE
2) Disable CONFIG_EFI
3) Disable CONFIG_RISCV_ISA_C

In case you depend on CONFIG_EFI you are out of luck because EFI support currently requires CONFIG_RISCV_ISA_C.



Dear Christoph,

Previously, you had suggested that we compile the kernel with CONFIG_RISCV_ISA_C disabled, and the CONFIG_EFI option also disabled. Now, we need to enable the CONFIG_EFI option to support EFI.

We understand that enabling CONFIG_EFI while disabling CONFIG_RISCV_ISA_C can be a bit challenging, but we have a plan to proceed with the following options:

    1. Enabling CONFIG_EFI:
    Since our system relies on CONFIG_EFI and we require EFI support, we aim to maintain it. We are aware that EFI currently requires CONFIG_RISCV_ISA_C. We will work on finding a solution that allows us to keep EFI functionality while disabling CONFIG_RISCV_ISA_C.

    2. Disabling CONFIG_RISCV_ISA_C:
    We also need to disable CONFIG_RISCV_ISA_C as we require a kernel image without compressed instructions.

If you have any additional insights or recommendations regarding this configuration change, your input would be greatly appreciated.

Thank you for your assistance, and we eagerly anticipate your continued guidance as we move forward with these changes.

Best regards,

Billa
 
BR
Christoph


On Thu, Aug 18, 2022 at 2:50 PM Billa Surendra <billa.i...@gmail.com> wrote:
Dear All,

I am unable to port Linux kernel-5.19.6 to the RISC-V (RV64IMAFD) target. I have generated a cross compiler with arch=rv64imafd and abi=lp64d flags. Cross compiled sample program and checked, generated binary does not have compressed instructions.

I tried compiling linux-5.19.6 with a cross compiler but no luck. In Between I have  checked the .config file, C model is enabled (CONFIG_RISCV_ISA_C=y), Tried disabling but after running make menuconfig again it is enabled. Even not possible to disable with the help of make menuconfig.
Here I am attaching screenshots for reference.

Please advise me The following things
1. how to port the linux kernel to rv64imafd ?.
2. Any specific linux kernel version will support for rv64imafd ?.

I am really struck by this. Please help me.

Thank you
Billa

--
You received this message because you are subscribed to the Google Groups "RISC-V SW Dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email to sw-dev+un...@groups.riscv.org.
To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/CAKBF_5rmVcFS0Ji1hwHAq%2BjpEoasXBoG3e%3DEBpM4JbXdpbQ6Og%40mail.gmail.com.

Alexandre Ghiti

unread,
Nov 9, 2023, 4:10:24 AM11/9/23
to Billa Surendra, Christoph Müllner, RISC-V SW Dev
Hi,

On Thu, Nov 9, 2023 at 7:21 AM Billa Surendra <billa.i...@gmail.com> wrote:
>
>
> On Thu, Aug 18, 2022 at 8:00 PM Christoph Müllner <christoph...@vrull.eu> wrote:
>>
>> Hi Billa,
>>
>> CONFIG_RISCV_ISA_C can be disabled by the following steps:
>>
>> 1) Enable CONFIG_NONPORTABLE
>> 2) Disable CONFIG_EFI
>> 3) Disable CONFIG_RISCV_ISA_C
>>
>> In case you depend on CONFIG_EFI you are out of luck because EFI support currently requires CONFIG_RISCV_ISA_C.
>>
>
>
> Dear Christoph,
>
> Previously, you had suggested that we compile the kernel with CONFIG_RISCV_ISA_C disabled, and the CONFIG_EFI option also disabled. Now, we need to enable the CONFIG_EFI option to support EFI.
>
> We understand that enabling CONFIG_EFI while disabling CONFIG_RISCV_ISA_C can be a bit challenging, but we have a plan to proceed with the following options:
>
> 1. Enabling CONFIG_EFI:
> Since our system relies on CONFIG_EFI and we require EFI support, we aim to maintain it. We are aware that EFI currently requires CONFIG_RISCV_ISA_C. We will work on finding a solution that allows us to keep EFI functionality while disabling CONFIG_RISCV_ISA_C.
>
> 2. Disabling CONFIG_RISCV_ISA_C:
> We also need to disable CONFIG_RISCV_ISA_C as we require a kernel image without compressed instructions.
>
> If you have any additional insights or recommendations regarding this configuration change, your input would be greatly appreciated.

Björn proposed something for the kernel and openSBI in order to
support EFI without C here:
https://lore.kernel.org/linux-riscv/871qd04...@all.your.base.are.belong.to.us/T/#m63aa2ba8ac95b2f0d1a2e7c0223ee305efa6cc29

>
> Thank you for your assistance, and we eagerly anticipate your continued guidance as we move forward with these changes.
>
> Best regards,
>
> Billa
>
>>
>> BR
>> Christoph
>>
>>
>> On Thu, Aug 18, 2022 at 2:50 PM Billa Surendra <billa.i...@gmail.com> wrote:
>>>
>>> Dear All,
>>>
>>> I am unable to port Linux kernel-5.19.6 to the RISC-V (RV64IMAFD) target. I have generated a cross compiler with arch=rv64imafd and abi=lp64d flags. Cross compiled sample program and checked, generated binary does not have compressed instructions.
>>>
>>> I tried compiling linux-5.19.6 with a cross compiler but no luck. In Between I have checked the .config file, C model is enabled (CONFIG_RISCV_ISA_C=y), Tried disabling but after running make menuconfig again it is enabled. Even not possible to disable with the help of make menuconfig.
>>> Here I am attaching screenshots for reference.
>>>
>>> Please advise me The following things
>>> 1. how to port the linux kernel to rv64imafd ?.
>>> 2. Any specific linux kernel version will support for rv64imafd ?.
>>>
>>> I am really struck by this. Please help me.
>>>
>>> Thank you
>>> Billa
>>>
>>> --
>>> You received this message because you are subscribed to the Google Groups "RISC-V SW Dev" group.
>>> To unsubscribe from this group and stop receiving emails from it, send an email to sw-dev+un...@groups.riscv.org.
>>> To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/CAKBF_5rmVcFS0Ji1hwHAq%2BjpEoasXBoG3e%3DEBpM4JbXdpbQ6Og%40mail.gmail.com.
>
> --
> You received this message because you are subscribed to the Google Groups "RISC-V SW Dev" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to sw-dev+un...@groups.riscv.org.
> To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/CAKBF_5ov7%3DfbfUam655wAZfu2xXDSRw27fZQHzgLM%2Bk3WvKKSg%40mail.gmail.com.

Rushikesh Jadhav

unread,
Jul 10, 2024, 6:07:13 AM7/10/24
to RISC-V SW Dev, alex...@rivosinc.com, christoph...@vrull.eu, RISC-V SW Dev, billa.i...@gmail.com
Hi,
        I tried Björn's proposed solution for the kernel. It boots fine with GRUB, but when I tried it with the EDK-II firmware, it resulted in a kernel panic as follows:




Linux version 6.9.5 (riscv64-unknown-linux-gnu-gcc (GCC) 13.2.0, GNU ld (GNU Binutils) 2.42) #3
SBI specification v0.3 detected
SBI implementation ID=0x1 Version=0x9
SBI TIME extension detected
SBI IPI extension detected
SBI RFENCE extension detected
earlycon: uart0 at MMIO32 0x0000000010000000 (options '115200n8')
printk: legacy bootconsole [uart0] enabled
efi: EFI v2.7 by EDK II
efi: SMBIOS=0x7e901000 INITRD=0x7e65ab98 MEMRESERVE=0x7e65ac18
Zone ranges:
  DMA32    [mem 0x0000000041000000-0x000000007fffffff]
  Normal   empty
Movable zone start for each node
Early memory node ranges
  node   0: [mem 0x0000000041000000-0x000000007e660fff]
  node   0: [mem 0x000000007e661000-0x000000007e6c7fff]
  node   0: [mem 0x000000007e6c8000-0x000000007e87ffff]
  node   0: [mem 0x000000007e880000-0x000000007e905fff]
  node   0: [mem 0x000000007e906000-0x000000007f985fff]
  node   0: [mem 0x000000007f986000-0x000000007f9d9fff]
  node   0: [mem 0x000000007f9da000-0x000000007f9e5fff]
  node   0: [mem 0x000000007f9e6000-0x000000007f9e9fff]
  node   0: [mem 0x000000007f9ea000-0x000000007fffffff]
Initmem setup node 0 [mem 0x0000000041000000-0x000000007fffffff]
SBI HSM extension detected
CPU with hartid=0 is not available
------------[ cut here ]------------
kernel BUG at arch/riscv/kernel/smpboot.c:153!
Kernel BUG [#1]
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 6.9.5 #3
epc : setup_smp+0x98/0x100
 ra : setup_smp+0x90/0x100
epc : ffffffff80a040f0 ra : ffffffff80a040e8 sp : ffffffff81403e10
 gp : ffffffff814d0b20 tp : ffffffff8140acc0 t0 : 000000000000006e
 t1 : 0000000000000064 t2 : 0000000000000003 s0 : ffffffff81403e60
 s1 : 0000000000000000 a0 : 0000000000000000 a1 : 0000000000000000
 a2 : 0000000000000004 a3 : 00000000000000e3 a4 : 0000000000000000
 a5 : 00000000000000e4 a6 : ffffffff80ef5e89 a7 : ffffffff80ef5e20
 s2 : 0000000000000005 s3 : 0000000000000000 s4 : ffffffff810555e8
 s5 : 000000000000003f s6 : 000000007fa0a3c8 s7 : 000000006c8fe6d0
 s8 : 000000007fa0a3c0 s9 : 0000000000000004 s10: 000000007db1fd48
 s11: 000000007d99d220 t3 : 0000000000ff0000 t4 : ffffffff814e4402
 t5 : ffffffff814e43e0 t6 : ffffffff81403c30
status: 0000000200000100 badaddr: 0000000000000000 cause: 0000000000000003
[<ffffffff80a040f0>] setup_smp+0x98/0x100
[<ffffffff80a03d60>] setup_arch+0xe2/0x134
[<ffffffff80a00842>] start_kernel+0x84/0x602
Code: 4985 8526 7097 ffcc 80e7 eb40 84aa b765 9363 0009 (9002) 8493
---[ end trace 0000000000000000 ]---
Kernel panic - not syncing: Fatal exception in interrupt
---[ end Kernel panic - not syncing: Fatal exception in interrupt ]---




Please advice me for this problem.

Thank you,
Rushikesh J.
Reply all
Reply to author
Forward
0 new messages