Availability of RISC-V Virtual Platform for FE-310 using Spike Simulator

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Ameya Vikram Singh

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Jan 3, 2019, 6:49:14 AM1/3/19
to RISC-V SW Dev
Hello Everyone,

I am looking for virtual models/virtual platforms for SiFive FE-310 platform implemented using Spike simulator.

Basically capturing the peripheral details e.g.: UART, SPI etc.

If anyone has any ideas let me know.

Also want to understand if people use Spike ISS to develop the virtual platform of complete SoC. How are the IP models developed for integration with this ISS, is there some methodology ? We are exploring to use Spike ISS in SystemC modeling environment. Any pointers in this direction will be useful.

Thanks and Regards,
Ameya Vikram Singh

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Ameya Vikram Singh | Senior Member of Technical Staff  | CircuitSutra | +91 8122657508 |  
ESL Methodologies: SystemC Modeling IP & Services
(We are defining modeling methodologies for RISC-V ecosystem & AI/DL SoC) 

Jim Wilson

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Jan 3, 2019, 11:40:49 AM1/3/19
to Ameya Vikram Singh, RISC-V SW Dev
On Thu, Jan 3, 2019 at 3:49 AM Ameya Vikram Singh
<ameya....@circuitsutra.com> wrote:
> I am looking for virtual models/virtual platforms for SiFive FE-310 platform implemented using Spike simulator.
> Basically capturing the peripheral details e.g.: UART, SPI etc.

Doesn't exist as far as I know. Spike is the golden reference ISA
implementation, but doesn't have any interesting peripherals. Qemu
does have support for peripherals, and has models for sifive e and u
platforms.

Jim

Umesh Sisodia

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Jan 4, 2019, 3:06:20 AM1/4/19
to Jim Wilson, Ameya Vikram Singh, RISC-V SW Dev, Umesh Sisodia
Hi Jim,

Good that Risc-V have a golden reference simulator.

Just curious to know, how do people use this ISS and for what purpose. Has anyone integrated it in the Verilog / SystemC simulation environment.


Does it provides some kind of hooks in the code to integrate into the HDL simulation environment. We are planning to use it in SystemC simulation environment, some pointers in this direction will be useful.


Regards,

Umesh



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Jim Wilson

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Jan 4, 2019, 12:26:50 PM1/4/19
to Umesh Sisodia, Ameya Vikram Singh, RISC-V SW Dev
On Fri, Jan 4, 2019 at 12:06 AM Umesh Sisodia <usis...@circuitsutra.com> wrote:
> Just curious to know, how do people use this ISS and for what purpose. Has anyone integrated it in the Verilog / SystemC simulation environment.

I'm not a hardware guy, so I don't know anything about Verilog or
SystemC simulation.

I use qemu myself, as qemu can boot linux, and give a system that can
be used for software development. Spike can boot linux, but no
devices means you can't use it as a development system. I think spike
is primarily useful for cpu designers who want to verify that their
cpu design is executing basic instructions correctly, by comparing
against spike behavior. spike gives better traces than qemu. But I'm
not a hardware guy, so i don't know for sure about these things.

Jim

Umesh Sisodia

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Jan 4, 2019, 1:10:49 PM1/4/19
to Jim Wilson, Ameya Vikram Singh, RISC-V SW Dev, Umesh Sisodia
Hi Jim,

Thanx for the clarification.

Regards,
Umesh
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