VSDOpen2020 Tutorials on Sky130, RISC-V and OpenLANE

[Anagha Ghosh]

Hey There,

Glad to announce VSDOpen2020 - Only online conference on open-source EDA, RISC-V, Learning, Analog and Digital IP's

VSDOpen 2020 is bigger and better !!

VSDOpen 2020 has LIVE Tutorial Session on Sky130, RISC-V and OpenLANE

VSDOpen 2020 will showcase open-source analog IP’s

VSDOpen 2020 is for 4-days

We are really excited to showcase some masterpieces of work done by Research Interns over last year, and also, we are really excited to introduce you to novel techniques of learning and designing analog/digital IP’s. This time, we are about to showcase you a list of projects which was achieved for the very first time in the field of open-source.

To Begin with: First time in the open-source world, 

• We have open-source analog IP’s built from scratch using OSU-180nm PDK, Magic and eSim EDA tools, by undergrad and postgrad students. Unbelievable!!
• We displayed to the RISC-V community around the globe how you can design a basic RISC-V core in just 5-days from scratch using TL-Verilog and Makerchip IDE. Unbelievable!!
• We released a cloud-based VSD-Intelligent Assessment Technology platform which enables VLSI training for all time-zones at one go and is about 99% effective compared to any other training around the globe.
• We will show you how you can develop your own SoC using real 130nm PDK from Skywater and OpenLANE EDAtool-chain from efabless

Here's the link to register for tutorials on Sky130, RISC-V and OpenLANE:

https://www.vlsisystemdesign.com/registration/

Here's the link to register for conference on 10th:

https://www.vlsisystemdesign.com/2020-2/

All the best and happy learning