Question: RISC-V Immediate Encoding Variants

[Ammar Kurd]

Can anyone help answer my question here in stackoverflow http://stackoverflow.com/questions/39427092/risc-v-immediate-encoding-variants

Thanks in advance.

[Stefan O'Rear]

On Sun, Sep 11, 2016 at 6:11 AM, Ammar Kurd <kurd....@gmail.com> wrote:
> Can anyone help answer my question here in stackoverflow
> http://stackoverflow.com/questions/39427092/risc-v-immediate-encoding-variants

Copying from §2.3 of the ISA manual:

> The only difference between the S and SB formats is that the 12-bit immediate field is used to encode branch offsets in multiples of 2 in the SB format. Instead of shifting all bits in the instructionencoded immediate left by one in hardware as is conventionally done, the middle bits (imm[10:1]) and sign bit stay in fixed positions, while the lowest bit in S format (inst[7]) encodes a high-order bit in SB format.

> Similarly, the only difference between the U and UJ formats is that the 20-bit immediate is shifted left by 12 bits to form U immediates and by 1 bit to form J immediates. The location of instruction bits in the U and UJ format immediates is chosen to maximize overlap with the other formats and with each other.

Branches go from -4096 to +4094 in increments of 2, other 12-bit
immediates (ADDI) go from -2048 to +2047 in increments of 1...

-s