Extension for overflow calculation?
29 views
Skip to first unread message
Paris Oplopoios
Jul 3, 2025, 11:45:18 AMJul 3
to RISC-V ISA Dev
Hello,
Emulating x86 or AArch64 on RISC-V requires emulating the flags using multiple instructions. While zero, negative and carry flags can be calculated in one or two instructions, this isn't the case with the overflow flag.
It would be helpful to be able to do the calculation in a single instruction.
For example, instructions like these (placeholder names):
ofadd t1, t2, t3 would set t1 to 1 if t2 + t3 overflows, 0 otherwise
ofsub t1, t2, t3 would set t1 to 1 if t2 - t3 overflows, 0 otherwise
Seeing that RISC-V has an extension group "J" for JIT acceleration extensions, this could be helpful for recompiling x86 or AArch64 to RISC-V
Emulating x86 or AArch64 on RISC-V requires emulating the flags using multiple instructions. While zero, negative and carry flags can be calculated in one or two instructions, this isn't the case with the overflow flag.
It would be helpful to be able to do the calculation in a single instruction.
For example, instructions like these (placeholder names):
ofadd t1, t2, t3 would set t1 to 1 if t2 + t3 overflows, 0 otherwise
ofsub t1, t2, t3 would set t1 to 1 if t2 - t3 overflows, 0 otherwise
Seeing that RISC-V has an extension group "J" for JIT acceleration extensions, this could be helpful for recompiling x86 or AArch64 to RISC-V
Reply all
Reply to author
Forward
0 new messages