Which RVV isa does this signed to one bit action map?

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ShengHan Wu

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Aug 26, 2021, 2:50:14 AM8/26/21
to RISC-V ISA Dev
Hi Sirs,

I learned RVV for one month more, and would like to program with RVV assembly as algorithm accelerator. 
I wonder one action that I cannot any idea. This is parallel action that signed value to one-bit(signed bit), and reverse one bit to flip signed value (1: that neg to pos, pos to neg, 0: keep the same sign).

To explain clearly, the figure is below. Extract sign bit in each element value to one or more regs. Or each bit in multi-bit reg  change corresponding element signed value.

I am searching this type of assembly. Thank you

未命名.png


Nick Knight

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Aug 26, 2021, 3:18:46 AM8/26/21
to ShengHan Wu, RISC-V ISA Dev
I'm not sure I'm parsing this question correctly. I'm also not sure this is on-topic for the [isa-dev] mailing list, although rather little seems to be these days, and I'm not interested in policing it.

Anyway, how about vmsle.vi (imm=-1) to extract the sign bits, and masked vxor.vx (with rs1=-128, -32768, etc.) to toggle the sign bits? In the latter case, if you want to actually negate the two's complement value (vs. just toggle the sign bit) you could do a masked vmul.vx (rs1=-1). Might have to do a little shuffling to get things in and out of the mask registers, depends on the larger application.

Best,
Nick


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