New Jira spec interface; comment on Zilsp draft 0.8.1

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L Peter Deutsch

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Mar 25, 2024, 11:56:24 PMMar 25
to RISC-V ISA Dev
I found the new Jira interface, which I just used for the first time,
complex, confusing, and awkward; I had to click through something like 5
links just to get to the spec proposal. Is there a good resource somewhere
for learning how to navigate the new interface?

Meanwhile, Chapter 2 of the Zilsp draft says:

Regardless of endianness, the lower-numbered register holds the
low-order bits, and the higher-numbered register holds the
high-order bits: e.g., bits 31:0 of an operand in Zilsp might be
held in register x14, with bits 63:32 of that operand held in x15.

Consider the instruction ld rd,z. The above paragraph says that in a
big-endian system, the 32 bits at z..z+3 will be loaded into rd+1, and the
32 bits at z+4..z+7 will be loaded into rd, while in a LE system, z..z+3
will go to rd, and z+4..z+7 will go to rd+1. This is a reasonable choice
for actual 64-bit operands, but if a compiler wants to use these
instructions to (for example) reduce the number of instructions for storing
32-bit arguments onto the stack in a procedure prologue, it will have to be
aware of the fact that the two 32-bit values will be loaded and stored in
the opposite order depending on the system endianness: it will have to care
because the 32-bit values will be accessed individually from memory. I
think some version of this observation might be worth including in the spec.

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L Peter Deutsch :: Aladdin Enterprises :: Healdsburg, CA & Burnaby, BC

K. York

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Mar 26, 2024, 1:40:44 AMMar 26
to L Peter Deutsch, RISC-V ISA Dev
Endianness is already part of the target specification for all modern compilers and should not be changing within a single program.

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Rafael Sene

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Mar 26, 2024, 8:18:59 AMMar 26
to RISC-V ISA Dev, L Peter Deutsch
@Peter, I'm interested in learning about the steps you executed :) Could you describe them? (if you prefer, send me an email raf...@riscv.org).

You can use as entry point tech.riscv.org, from there you can click on Active Specification Status. Then, just open the spec you want and click at the GitHub link available.

L Peter Deutsch

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Mar 26, 2024, 9:54:54 AMMar 26
to Rafael Sene, isa...@groups.riscv.org
> @Peter, I'm interested in learning about the steps you executed :) Could you
> describe them? (if you prefer, send me an email raf...@riscv.org).

I've e-mailed you separately the exact list of the 14 clicks that it took me
to get to the doc I wanted. No need to involve the list any further.
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