Alternative RV128 CLARIFICATION: registers are 16x64b+16x[64b or 128b]

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Xan Phung

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Feb 7, 2023, 8:36:15 AM2/7/23
to RISC-V ISA Dev
Hi, some of the comments I got about yesterday's post ("Alternative RV128: 16x 64b + 16x 128b registers are better than 32x 128b") appeared to think the 128b registers couldn't hold 64b values.

To clarify, my ISA allows 64b values in either the 64b registers or the 128b registers.

As a result, my ISA more or less does anything a 32x64b register set can do, but it limits 128b quantities to registers #16-#31 only.

(See attached PDF file for overview of my proposed Alternative RV128 instruction set & yesterday's post for more detailed discussion on the register model - apologies I didn't make it clearer all 32 registers can hold 64b values).

People are either saying (apologies if I am grossly oversimplifying - which I admit guilty to):
(i) the 128b registers are unnecessary, 64b computing is sufficient,
OR
(ii) your proposal is inferior to having 32x 128b registers - and if you reduce to 16x 128b registers then it is not enough, there will be register spills! 

==> This must mean I am doing something correct, as both of the above can't be true - the optimal choice is somewhere between zero x 128b to 32 x 128b registers, so maybe 16x 128b is the best choice after all!!! :)

RV128 Alternative Proposal.pdf
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