Triggers (tselect and tdata1)
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JAYANTH R
Mar 22, 2024, 12:01:31 AMMar 22
to RISC-V ISA Dev
1) Can tselect and tdata1 triggers be accessed in u-mode ?
2) How do I set "type" bit in tdata1 to 3 or 6 (instruction count / mcontrol6 )
because the value in tdata1 it is 0 .
2) How do I set "type" bit in tdata1 to 3 or 6 (instruction count / mcontrol6 )
because the value in tdata1 it is 0 .
Tommy Murphy
Mar 22, 2024, 3:48:42 AMMar 22
to JAYANTH R, RISC-V ISA Dev
> 1) Can tselect and tdata1 triggers be accessed in u-mode?
The debug spec Version 1.0.0-rc2 (https://github.com/riscv/riscv-debug-spec/releases) section 5.7 says:
"The Trigger Module registers, except mscontext, scontext, and hcontext, are only accessible in machine and Debug Mode to prevent untrusted user code from causing entry into Debug Mode without
the OS’s permission."
> 2) How do I set "type" bit in tdata1 to 3 or 6 (instruction count / mcontrol6 ) because the value in tdata1 it is 0 .
Section 5.7.2 describes this register. tdata1:type is a 4-bit field, not a single bit. I don't understand what the problem is here. Maybe you can clarify?
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