Re: Public Review for RISC-V Pointer Masking Specification

[Martin Maas]

The public review period for the RISC-V Pointer Masking Specification concluded on April 19.

The following feedback has been received, and was addressed in the latest version of the spec (1.0.0-rc2):

* Concerns were raised about the number of extensions introduced by the spec [1] and the complexity of their description [2]. Language was added to explain the rationale behind these extensions and why they are necessary.

* A question was raised whether pointer masking applies to DMA units [3]. The spec already stated that devices are not subject to pointer masking, and a note was added to explicitly clarify that this includes DMA units.

* There was a question about which MXR field is used for determining whether pointer masking applies [4]. The language was updated to clarify this.

* A question was raised about the impact of SPVP on HLV.*/HSV.*, but it was determined that the current spec already defines this behavior [5].

* In response to a question about SFENCE [6], the Architecture Review Committee identified an issue with the current spec that applied pointer masking to the address passed to SFENCE.*, SINVAL.*, etc. Doing so would have created a scenario where supervisor code can map an executable code region by modifying the page table, but is unable to apply an SFENCE to it. Since operating systems are already expected to untag user pointers in software, and since a common use of SFENCE is in page fault handlers (which already have the address untagged), it was determined that SFENCE.*, HFENCE.*, SINVAL.*, or HINVAL.* should *not* apply pointer masking. The spec was updated accordingly.

The latest version of the spec can be found here:

https://github.com/riscv/riscv-j-extension/blob/master/zjpm-spec.pdf

We want to thank everyone who worked on the spec and/or contributed feedback!

Martin Maas and Adam Zabrocki
Chair & Vice-Chair, J Extension TG

[1] https://github.com/riscv/riscv-j-extension/issues/68
[2] https://github.com/riscv/riscv-j-extension/issues/71
[3] https://github.com/riscv/riscv-j-extension/issues/69
[4] https://github.com/riscv/riscv-j-extension/issues/70
[5] https://github.com/riscv/riscv-j-extension/issues/72
[6] https://github.com/riscv/riscv-j-extension/issues/75

On Wed, Mar 20, 2024 at 1:47 PM Martin Maas <mm...@google.com> wrote:

The RISC-V J Extension TG is delighted to announce the start of the public review period for the proposed Smmpm, Smnpm, Ssnpm, Sspm, and Supm standard extension to the RISC-V ISA, collectively known as Pointer Masking.

The 30-day review period begins today, March 20, 2024, and ends on April 19, 2024.

These extensions are described in the PDF spec available at:

https://github.com/riscv/riscv-j-extension/releases/download/pointer-masking-v1.0.0-rc1/pointer-masking-v1.0.0-rc1.pdf

which was generated from the source available in the following GitHub folder:

https://github.com/riscv/riscv-j-extension/tree/master/zjpm

To respond to the public review, please either email comments to the public RISC-V ISA-Dev mailing list at isa...@groups.riscv.org or add issues to the GitHub repo:

https://github.com/riscv/riscv-j-extension/issues

During the public review period, corrections, comments, and suggestions, will be gathered for review by the J Extension group and the Unprivileged ISA committee. Any minor corrections and/or uncontroversial changes will be incorporated into the specification. Any remaining issues or proposed changes will be addressed in the public review summary report. If there are no issues that require incompatible changes to the public review specification, the Unprivileged ISA Committee will recommend the updated specifications be approved and ratified by the RISC-V Technical Steering Committee and the RISC-V Board of Directors.

Thanks to all the contributors for their hard work.

Martin Maas and Adam Zabrocki
Chair & Vice-Chair, J Extension TG