Question on interruption routing

[Timothée ZERBIB]

Hi all,

First of all, I am new on RISC-V and I would like to apologize if this question should have been asked to another group.

Here is a bit of context: in a research project in operating systems, we are trying to start different kernel images on the different cores of an emulated RISC-V + NUMA machine.

In order to achieve this goal, we start a first core, which is in charge of loading kernel images from the disk into the memory of the other cores before starting them (multi-kernel design). Thus, this first core needs to receive interruptions raised by different devices (mainly hard drive and uart). However, in the RISC-V platform of Qemu, the devices are hardwired to the PLICs of different NUMA domains (sockets).

As a result, for the moment, whatever core we choose to start first, it only receives some of these interrupts and thus, it can not load the other kernel images from disk and boot the other cores.

My question is then the following: is there a way to program some device (the PLIC, the underlying gateway or any other) in order to route an interrupt to a specific socket or core in software (just like we do with the IOAPIC on x86)? Or otherwise, is there a way to configure how Qemu wires the interrupts to the different sockets? In the worst case, I can modify Qemu, but it looks a little bit overkill for my need.

Thanks in advance!

Best regards,
Timothée ZERBIB