RISC-V ISA Dev

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Welcome to the RISC-V ISA Dev list / group. This list is used to share RISC-V ISA Development related ideas, questions and updates within the RISC-V community.

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JAYANTH R, Daniel Petrisko3

May 2

breakpoint exception and mret

1) if I use the ebreak statement in asm code , will it set a breakpoint exception ? Yes (with non-

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breakpoint exception and mret

1) if I use the ebreak statement in asm code , will it set a breakpoint exception ? Yes (with non-

May 2

May 1

Public review for Double Trap standard extension

Greetings! We are delighted to announce the commencement of the public review period for the Double

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Public review for Double Trap standard extension

Greetings! We are delighted to announce the commencement of the public review period for the Double

May 1

May 1

Greetings! We are delighted to announce the commencement of the public review period for the Double

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Greetings! We are delighted to announce the commencement of the public review period for the Double

May 1

Georgios Christou

Apr 29

Public review ended for Zicfilp and Zicfiss extensions.

Greetings! The review period for Zicfiss and Zicfilp extension spec. concluded on April 27. During

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Public review ended for Zicfilp and Zicfiss extensions.

Greetings! The review period for Zicfiss and Zicfilp extension spec. concluded on April 27. During

Apr 29

Apr 25

introducing Composable Extensions, and invitation to participate

Greetings. The Soft CPU SIG was formed in 2019 to advance RISC-V for FPGA SoCs, and on behalf of RISC

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introducing Composable Extensions, and invitation to participate

Greetings. The Soft CPU SIG was formed in 2019 to advance RISC-V for FPGA SoCs, and on behalf of RISC

Apr 25

Apr 19

Re: [RISC-V] [tech-privileged] Comments re {priv,unpriv}-isa-asciidoc-20240411.pdf

Hi, David, I'm sorry you had a problem. But, the issue is not that the group has been archived,

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Re: [RISC-V] [tech-privileged] Comments re {priv,unpriv}-isa-asciidoc-20240411.pdf

Hi, David, I'm sorry you had a problem. But, the issue is not that the group has been archived,

Apr 19

Rohan Ahmed, … Bruce Hoult8

Apr 18

Bit Manipulation C code style testing

Thanks to all of you for giving your insights. BR, Rohan On Thursday, April 18, 2024 at 7:20:23 AM

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Bit Manipulation C code style testing

Thanks to all of you for giving your insights. BR, Rohan On Thursday, April 18, 2024 at 7:20:23 AM

Apr 18

Apr 12

Re: Public Review for RISC-V CBQRI and Ssqosid specifications

Greetings!The review period for the RISC-V CBQRI non-ISA specification and its related Ssqosid ISA

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Re: Public Review for RISC-V CBQRI and Ssqosid specifications

Greetings!The review period for the RISC-V CBQRI non-ISA specification and its related Ssqosid ISA

Apr 12

Robertson, Iain

Apr 10

Public Review for Unformatted Trace & Diagnostic Data Packet Encapsulation for RISC-V specification

[3 rd attempt now that I have permission to post to ISA-Dev. With further apologies to those who

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Public Review for Unformatted Trace & Diagnostic Data Packet Encapsulation for RISC-V specification

[3 rd attempt now that I have permission to post to ISA-Dev. With further apologies to those who

Apr 10

Ved Shanbhogue2

Apr 9

Public review for Svvptc standard extension

Greetings ! The review period for the Svvptc standard extension concluded on April 8. We appreciate

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Public review for Svvptc standard extension

Greetings ! The review period for the Svvptc standard extension concluded on April 8. We appreciate

Apr 9

Ved Shanbhogue2

Apr 5

Public Review for RISC-V RERI non-ISA specification

Greetings ! The review period for RISC-V RAS Error Record Register Interface (RERI) non-ISA

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Public Review for RISC-V RERI non-ISA specification

Greetings ! The review period for RISC-V RAS Error Record Register Interface (RERI) non-ISA

Apr 5

Georgios Christou

Mar 28

Public review for Zicfilp and Zicfiss extensions

Dear all, We are delighted to announce the public review for the Zicfilp and Zicfiss standard

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Public review for Zicfilp and Zicfiss extensions

Dear all, We are delighted to announce the public review for the Zicfilp and Zicfiss standard

Mar 28

Mar 28

Re: [RISC-V tech-announce] Public Review for Zaamo and Zalrsc Standard Extensions

Greetings ! The review period for Zaamo and Zalrsc concluded on March 27. During the review Anders

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Re: [RISC-V tech-announce] Public Review for Zaamo and Zalrsc Standard Extensions

Greetings ! The review period for Zaamo and Zalrsc concluded on March 27. During the review Anders

Mar 28

L Peter Deutsch, … Rafael Sene4

Mar 26

New Jira spec interface; comment on Zilsp draft 0.8.1

> @Peter, I'm interested in learning about the steps you executed :) Could you > describe

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New Jira spec interface; comment on Zilsp draft 0.8.1

> @Peter, I'm interested in learning about the steps you executed :) Could you > describe

Mar 26

Ved Shanbhogue2

Mar 23

Public Review for B Standard Extension

Greetings ! The review period for the B standard extension concluded on March 22. We appreciate your

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Public Review for B Standard Extension

Greetings ! The review period for the B standard extension concluded on March 22. We appreciate your

Mar 23

JAYANTH R, Tommy Murphy2

Mar 22

Triggers (tselect and tdata1)

> 1) Can tselect and tdata1 triggers be accessed in u-mode? The debug spec Version 1.0.0-rc2 (

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Triggers (tselect and tdata1)

> 1) Can tselect and tdata1 triggers be accessed in u-mode? The debug spec Version 1.0.0-rc2 (

Mar 22

Mar 20

Public Review for RISC-V Pointer Masking Specification

The RISC-V J Extension TG is delighted to announce the start of the public review period for the

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Public Review for RISC-V Pointer Masking Specification

The RISC-V J Extension TG is delighted to announce the start of the public review period for the

Mar 20

Andrew Waterman

Mar 19

Public review of Smrnmi (resumable non-maskable interrupts) extension

Hi folks, We're happy to announce that the Smrnmi extension for resumable non-maskable interrupts

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Public review of Smrnmi (resumable non-maskable interrupts) extension

Hi folks, We're happy to announce that the Smrnmi extension for resumable non-maskable interrupts

Mar 19

Mar 7

Re: [RISC-V tech-announce] Public Review for Zabha Standard Extension

Greetings! The review period for the Zabha Fast Track Specification ended on March 6. During the

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Re: [RISC-V tech-announce] Public Review for Zabha Standard Extension

Greetings! The review period for the Zabha Fast Track Specification ended on March 6. During the

Mar 7

Ved Shanbhogue, BGB4

Feb 27

Public Review for Zaamo and Zalrsc Standard Extensions

On 2/27/2024 4:00 PM, Ved Shanbhogue wrote: > BGB wrote: >> So, looks like taking the 'A

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Public Review for Zaamo and Zalrsc Standard Extensions

On 2/27/2024 4:00 PM, Ved Shanbhogue wrote: > BGB wrote: >> So, looks like taking the 'A

Feb 27

BGB, … Al Martin15

Feb 13

Misc: Relative testing between RV64G and my own ISA.

On 2/13/2024 1:12 PM, Al Martin wrote: > Have you thought about /lowering /the frequency target?

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Misc: Relative testing between RV64G and my own ISA.

On 2/13/2024 1:12 PM, Al Martin wrote: > Have you thought about /lowering /the frequency target?

Feb 13

Feb 13

Got my arpl compiler to generate RISCV code. Bound to be lots of bugs yet. No assembler yet, but its

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Got my arpl compiler to generate RISCV code. Bound to be lots of bugs yet. No assembler yet, but its

Feb 13

Adnan Hamid, Andrew Waterman4

Feb 12

Possible specification typo for Sv57x4

A note for future readers: Working draft of the specification are at https://github.com/riscv/riscv-

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Possible specification typo for Sv57x4

A note for future readers: Working draft of the specification are at https://github.com/riscv/riscv-

Feb 12

leo thomas, Tommy Murphy2

Feb 8

Reg : Zcmp Extension ( cm.push and cm.pop instruction )

Doesn't the spec explain things adequately? * https://github.com/riscv/riscv-code-size-reduction

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Reg : Zcmp Extension ( cm.push and cm.pop instruction )

Doesn't the spec explain things adequately? * https://github.com/riscv/riscv-code-size-reduction

Feb 8

Ved Shanbhogue2

Feb 6

Public Review for Zimop and Zcmop Standard Extensions

Greetings ! The review period for the May-Be-Ops Fast Track Specification and its extensions, Zimop

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Public Review for Zimop and Zcmop Standard Extensions

Greetings ! The review period for the May-Be-Ops Fast Track Specification and its extensions, Zimop

Feb 6

Mori, Andrew Waterman2

Feb 6

Regarding Unofficial hartid Transmission from Machine Mode

I'm certain the behavior you mention was mandated in the early SBI drafts (since I helped write

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Regarding Unofficial hartid Transmission from Machine Mode

I'm certain the behavior you mention was mandated in the early SBI drafts (since I helped write

Feb 6

Feb 3

Public Review for Zabha Standard Extension

Greetings! We are delighted to announce the commencement of the public review period for the Byte and

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Public Review for Zabha Standard Extension

Greetings! We are delighted to announce the commencement of the public review period for the Byte and

Feb 3

Adnan Hamid, Tommy Murphy3

Jan 29

qemu: incorrect behavior for write to hgatp.ppn[1:0]

Thank you Tommy, very relevant. We were using qemu-8.1.3 from last December. We will try with the

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qemu: incorrect behavior for write to hgatp.ppn[1:0]

Thank you Tommy, very relevant. We were using qemu-8.1.3 from last December. We will try with the

Jan 29

Jan 22

Draft of Public review for standard extensions Sdext and Sdtrig

I just realized the subject says "draft of". This was not a draft. This was the actual

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Draft of Public review for standard extensions Sdext and Sdtrig

I just realized the subject says "draft of". This was not a draft. This was the actual

Jan 22

Jan 18

Public review for ISA extension Smcdeleg/Ssccfg

We are delighted to announce the start of the public review period for the following proposed

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Public review for ISA extension Smcdeleg/Ssccfg

We are delighted to announce the start of the public review period for the following proposed

Jan 18

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