Convert VPN to PPN

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Alfred

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Nov 7, 2016, 10:09:15 AM11/7/16
to RISC-V HW Dev
Hi all,
Figure 4.17 and 4.18 in RISC-V Privileged Architecture Doc. show that PPN[1] has extra 2 bits after convert from VPN.
VPN [1] and PPN[1] is 10 and 12 bits respectively. What use does these extra bits have? Why did we need it?

I'll appreciate any help.
Alfred 

Samuel Falvo II

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Nov 7, 2016, 11:45:58 AM11/7/16
to Alfred, RISC-V HW Dev
On Mon, Nov 7, 2016 at 7:09 AM, Alfred <d9530...@gmail.com> wrote:
> Hi all,
> Figure 4.17 and 4.18 in RISC-V Privileged Architecture Doc. show that PPN[1]
> has extra 2 bits after convert from VPN.
> VPN [1] and PPN[1] is 10 and 12 bits respectively. What use does these extra
> bits have? Why did we need it?

It allows a 32-bit processor to address physical memory with a 34-bit
address bus. In other words, instead of having physical access to a
mere 4GB of RAM, it actually lets you address up to 16GB. The only
caveat is that any one process has access to up to 4GB of virtual
address space.

The rationale behind this isn't to grant individual programs access to
more memory; however, it *does* let you run *more* programs with
32-bit hardware than you could with a classically 32-bit physical
address space.

--
Samuel A. Falvo II

Alfred

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Nov 8, 2016, 10:01:48 AM11/8/16
to RISC-V HW Dev, d9530...@gmail.com
Thank you for the your response.
I have further question.

32-bit virtual address can only address up to 4GB space.
It's mean that a 32-bit processor can only view 4GB space.
However, 34-bit physical address indicate physical space is 16GB.
How can 32-bit processor address to 34-bit physical space?

I'll appreciate any help.
Alfred 

Samuel Falvo II

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Nov 8, 2016, 10:13:42 AM11/8/16
to Alfred, RISC-V HW Dev
On Tue, Nov 8, 2016 at 7:01 AM, Alfred <d9530...@gmail.com> wrote:
> 32-bit virtual address can only address up to 4GB space.
> It's mean that a 32-bit processor can only view 4GB space.
> However, 34-bit physical address indicate physical space is 16GB.
> How can 32-bit processor address to 34-bit physical space?

In the page table entries; those extra 2 bits you were asking about
are where the CPU gets the high address bits from. Remember that page
frames can appear anywhere in the CPU's physical address space, and do
not need to be adjacent to each other. Since page tables do not store
the lower 12 bits of an address, that leaves room to store a larger
number of higher address bits. Notice how RISC-V only reserves 10
bits for page attributes.

Samuel Falvo II

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Nov 8, 2016, 10:16:34 AM11/8/16
to Alfred, RISC-V HW Dev
On Tue, Nov 8, 2016 at 7:01 AM, Alfred <d9530...@gmail.com> wrote:
> 32-bit virtual address can only address up to 4GB space.
> It's mean that a 32-bit processor can only view 4GB space.
> However, 34-bit physical address indicate physical space is 16GB.
> How can 32-bit processor address to 34-bit physical space?

In the page table entries; those extra 2 bits you were asking about
are where the CPU gets the high address bits from. Remember that page
frames can appear anywhere in the CPU's physical address space, and do
not need to be adjacent to each other. Since page tables do not store
the lower 12 bits

Valentin Nechayev

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Nov 8, 2016, 10:22:00 AM11/8/16
to Alfred, RISC-V HW Dev
Tue, Nov 08, 2016 at 07:01:47, d953010024 wrote about "Re: [hw-dev] Convert VPN to PPN":

> Thank you for the your response.
> I have further question.
>
> 32-bit virtual address can only address up to 4GB space.
> It's mean that a 32-bit processor can only view 4GB space.
> However, 34-bit physical address indicate physical space is 16GB.
> How can 32-bit processor address to 34-bit physical space?
>
> I'll appreciate any help.

A virtual address page is mapped into a physical page. One can allow
specifying essentially any length of physical page address; there is
_no_ principal limit here.

For 4KB pages and 34-bit physical space, a page directory entry,
addressed by bits 31-12 of virtual address, shall contain bits 33-12
of physical address. Of course, processor shall have enough pins and
such addresses shall be supported by chipset, memory controller, etc.,
but this doesn't conflict in any way with 32-bit virtual addressing mode.

There are multiple known cases of such implementation, for example:
PDP-11: 16-bit virtual address, 18- or 22-bit physical address.
x86 (32-bit mode): 32-bit virtual address, 36- to 39-bit physical
address.

OTOH such memory virtualization is generally inconvenient due to its
mode "a tiny window to huge world". Unless full physical address space
can be mapped twice to virtual address space, a supervisor has to
utilize frequent page switching. That's why most systems have been
tending to convert to 64-bit addressing on reaching 1-2GB of RAM.


-netch-

Alfred

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Nov 9, 2016, 9:43:44 AM11/9/16
to RISC-V HW Dev, d9530...@gmail.com, ne...@netch.kiev.ua
Thanks Valentin and Samuel. Your answer are really helpful and informative for me.

Valentin Nechayev於 2016年11月8日星期二 UTC+8下午11時22分00秒寫道:
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