FCSR : Accrued Exception Clearing

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sachin miglani

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Apr 6, 2021, 4:30:36 AMApr 6
to RISC-V HW Dev
Hi,

This is mentioned in RISCV Spec for FCSR Register.

“The accrued exception flags indicate the exception conditions that have arisen on any floating-point

arithmetic instruction since the field was last reset by software, as shown in Table 11.2”.

 

 

Capture.JPG


X21: 00000100

  1. First Instruction is : fsqrt.s            x17,x21

            O/p for this fpflags=00000001 fcsr=00000001 x17[32:63]=1c3504f3 

           This is correct 

        2. Now mine next instruction is : fcvt.s.wu          x17,x21(No NX for this command)

             What should be flag value ?

              fpflags=? fcsr=? x17[32:63]=43800000 




Regards

Sachin

Valentin Nechayev

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Apr 20, 2021, 1:27:04 AMApr 20
to sachin miglani, RISC-V HW Dev
hi,

Tue, Apr 06, 2021 at 01:30:36, smiglani2503 wrote about "[hw-dev] FCSR : Accrued Exception Clearing":

> 2. Now mine next instruction is : fcvt.s.wu x17,x21(No NX
> for this command)
> What should be flag value ?
> * fpflags=? fcsr=? *x17[32:63]=43800000

Conversion from unsigned integer 256 is exact. So, NX is not raised by
the instruction; but it is kept if was 1 before the instruction
execution. So, this conversion wonʼt change FCSR.
This is how "accrued" works.
You can also treat this as if each computational floating-point operation does

fcsr |= this_operation_exceptions;


-netch-
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