Hi,
I used to build Rocket verilog using steps more or less in line with
the README.md at
https://github.com/chipsalliance/rocket-chip :
git clone --recursive
https://github.com/chipsalliance/rocket-chip
make -C rocket-chip/vsim verilog
(after setting RISCV to a valid path and leaving CONFIG to the
default, for now).
This used to work before the update to the "mill build system", but
now I'm getting:
make: Entering directory '/tmp/rocket-chip/vsim'
cd /tmp/rocket-chip && mill rocketchip.assembly
/bin/bash: line 1: mill: command not found
make: *** [/tmp/rocket-chip/Makefrag:47: /tmp/rocket-chip/out/rocketchip/assembly.dest/out.jar] Error 127
make: Leaving directory '/tmp/rocket-chip/vsim'
Any idea what the new standard build proceduer is? Are we depending on
a "mill" prerequisite that should be installed separately on the
machine doing the build (as opposed to it being included as one of the
submodules in the `rocket-chip` repo)?
Any pointers much appreciated!
Thanks,
--Gabriel