confusion on ClockDivider in the rocket chip code

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Jerry Ho

Nov 10, 2020, 7:58:38 PM11/10/20
to RISC-V HW Dev
I am reading the rocketchiop code now, and have a little confusion on this block comment of the ClockDivider2 class:
This black-boxes a Clock Divider by 2. The output clock is phase-aligned to the input clock. If you use this in synthesis, make sure your sdc declares that you want it to do the same.
Because Chisel does not support blocking assignments, it is impossible to create a deterministic divided clock.

my condusion is that what is the deisgn consideration of  not supporting the blocking assignments? and why it is impossible to create a deterministic divides clock by the non-blocking assignment? 
Also a stupid question, What is the sdc, I am a software guy, I hope my confusion doesn't make me silly! Thanks!

Hogege NaN

Nov 11, 2020, 12:45:56 AM11/11/20
to Jerry Ho, RISC-V HW Dev
Hi Ho-san,

Let see this article; introduction to SDC;


2020/11/11 9:58、Jerry Ho <>のメール:

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