Google Summer of Code projects

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Stefan Wallentowitz

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Jan 22, 2018, 1:52:20 PM1/22/18
to RISC-V HW Dev
Hi everyone,

as in the previous years the Free and Open Source Silicon Foundation
applies as an umbrella organization in the Google Summer of Code [1]. As
an umbrella org we give smaller projects the chance to participate in
Google Summer of Code under our guidance.

Over the last years we had a couple of RISC-V related projects, for
example the great project "Updating Sodor" last year [2].

If you are interested to participate with your project, please get in
touch with me and provide us a short idea description similar to last
years ideas [3].

Looking forward to your ideas.

Cheers,
Stefan

[1] https://summerofcode.withgoogle.com/
[2] https://codelec.github.io/gsoc/gsoc3/
[3] https://fossi-foundation.org/gsoc17-ideas

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RISHABH JAIN

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Feb 12, 2018, 8:33:28 AM2/12/18
to RISC-V HW Dev
Hello Stefan,

I am interested in participating in GSoC via contributing to RISC-V hardware development.

I have read and practiced tutorials 1-3 on this page: https://github.com/librecores/riscv-sodor/wiki/Tutorial-Home
While following the pages, I implemented some problems in $TUT_HOME/src/main/problems directory. 
I have set up my laptop (having Kali linux) with necessary tools to learn chisel and generator Bootcamp.
Now, I  learning advance examples like black box. 
Also, this semester, I am learning computer architecture course. 
I have done two projects on Digital Design, implemented on Xilinx zedboard. 
I believe I can help in hardware development of RISC-V.

How should I work to get selected? 
Any suggesstions !

Max Hayden Chiz

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Feb 12, 2018, 12:28:45 PM2/12/18
to RISHABH JAIN, RISC-V HW Dev
I think there is an official list of proposals from prospective mentors:

There isn't that much RISC-V stuff there, but I really like both of Kritik Bhimani's ideas.

Beyond what's on that page, it was recently mentioned that a good undergraduate project would be to implement macro-op fusion / prediction so that a branch instruction followed by a move would be handled as a single conditional move instruction in Rocket. (See David Chisnall's post in the graduate student research project thread.)

Ideally any forward branch with an offset less than the pipeline shadow would turn all of the covered instructions into predicated ones. There are some additional macro-op fusion things discussed in UCB technical report EECS-2016-130 that would be worth implementing as well if you have time. (See post by Jacob Bachmeyer in said thread.)

Additionally, there may be some (SoC-type) peripherals that would make for a good undergraduate project. But I'm not sure what is available in open source already and what other people are working on. Maybe someone more knowledgeable of the ecosystem can comment. (Or maybe someone on the discu...@lists.librecores.org list can help.)

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Stefan Wallentowitz

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Feb 12, 2018, 2:38:22 PM2/12/18
to hw-...@groups.riscv.org
Hi everyone,

The Free and Open Source Silicon (FOSSi) Foundation is happy and honored
to be part of the Google Summer of Code (GSoC) again this year. We are a
mentoring organization and serve as an umbrella organization for many
projects related to open source silicon design, open source EDA tools
and the related ecosystem. More:
https://fossi-foundation.org/2018/02/12/gsoc

We already have a long list of great ideas here:
https://fossi-foundation.org/gsoc18-ideas.html

If you are a student, now is the right time to start planning your
Google Summer of Code! If you run an open source silicon project, we are
still looking for interesting summer projects.

As mentioned in an earlier mail we are very happy to host your RISC-V
projects or projects related to other FOSSi communities. Please get in
touch.

Cheers,
Stefan
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Stefan Wallentowitz

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Feb 12, 2018, 2:42:03 PM2/12/18
to hw-...@groups.riscv.org
Hi,

On 12.02.2018 18:28, Max Hayden Chiz wrote:
> I think there is an official list of proposals from prospective mentors:
> https://fossi-foundation.org/gsoc18-ideas.html
>
> There isn't that much RISC-V stuff there, but I really like both
> of Kritik Bhimani's ideas.
>
> Beyond what's on that page, it was recently mentioned that a good
> undergraduate project would be to implement macro-op fusion / prediction
> so that a branch instruction followed by a move would be handled as a
> single conditional move instruction in Rocket. (See David Chisnall's
> post in the graduate student research project thread.)
>
> Ideally any forward branch with an offset less than the pipeline shadow
> would turn all of the covered instructions into predicated ones. There
> are some additional macro-op fusion things discussed in UCB technical
> report EECS-2016-130 that would be worth implementing as well if you
> have time. (See post by Jacob Bachmeyer in said thread.)
>
> Additionally, there may be some (SoC-type) peripherals that would make
> for a good undergraduate project. But I'm not sure what is available in
> open source already and what other people are working on. Maybe someone
> more knowledgeable of the ecosystem can comment. (Or maybe someone on
> the discu...@lists.librecores.org
> <mailto:discu...@lists.librecores.org> list can help.)

Thanks, that summarizes it very well! We highly encourage students to
bring up their own ideas, and will take care to find the right mentors.
Please get in touch with us either on the aforementioned mailing list or
directly at gs...@fossi-foundation.org.

Cheers,
Stefan

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