UART interface to a RISC-V RV32I Core

[Satyajit Bora]

Hello all,

I have a small riscv core which can perform all RV32I instructions. I want to interface a UART with this core on an FPGA platform, so that if I print a message using "printf" function in C code, it can display the message on terminal through uart.

Can anyone please tell me, how should I proceed ? Do I need to modify the compiler ?

I am an electronics engineer and modifying the compiler is a tough job for me. If there is a easier way to do that please let me know.

Regards,

Satyajit

[Euripedes Rocha Filho]

Hi Satyajit,

how your UART core is interfacing to the core? Is it memory mapped? You will need to write a small logging function or even implement printf and redirect it to the UART IP. It's more an embedded C/driver job than compiler. 

Regards

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[Dr Jonathan Kimmitt]

No need to modify the compiler, just write a routine similar to this:

#include <string.h>
#include <stdarg.h>

int printf (const char *fmt, ...)
{
  char buffer[99], *sptr = buffer;
  va_list va;
  int rslt;
  va_start(va, fmt);
  rslt = vsnprintf(buffer, sizeof(buffer), fmt, va);
  va_end(va);
  while (*sptr) uart_send(*sptr++);
  return rslt;
}

You will need to write the routine uart_send() which will be hardware dependent, and just needs to wait for the UART output to drain, before adding the next character.

[Satyajit Bora]

Thank you for the reply.

Can you please explain, how can I write the routine for uart_send() ? Sorry, if I am asking too basic question.

[Dr Jonathan Kimmitt]

That will depend on your hardware. If it is 16550 compliant you could use something like this:

// RBR: Receiver buffer register [Read, LCR[7] == 0]
#define UART_RBR 0x0u
// THR: Transmitter Holding register [Write, LCR[7] == 0]
#define UART_THR 0x0u
// IER: Interrupt enable register [Read/Write, LCR[7] == 0]
#define UART_IER 0x1u
// IIR: Interrupt identification register [Read]
#define UART_IIR 0x2u
// FCR: FIFO control register [Write, Read only when LCR[7] == 1]
#define UART_FCR 0x2u
// LCR: Line control register [Read/Write]
#define UART_LCR 0x3u
// MCR: Modem control register [Read/Write]
#define UART_MCR 0x4u
// LSR: Line status register [Read/Write]
#define UART_LSR 0x5u
// MSR: Modem status register [Read/Write]
#define UART_MSR 0x6u
// SCR: Scratch register [Read/Write]
#define UART_SCR 0x7u
// DLL: Divisor latch (least significant byte) register [Read/Write, LCR[7] == 1]
#define UART_DLL 0x0u
// DLM: Divisor latch (most significant byte) register [Read/Write, LCR[7] == 1]
#define UART_DLM 0x1u

volatile uint32_t *uart_base_ptr = (uint32_t *)(UART_BASE);

void uart_init() {
  // set 0x0080 to UART.LCR to enable DLL and DLM write
  // configure baud rate
  *(uart_base_ptr + UART_LCR) = 0x0080;

  // System clock 25 MHz, 115200 baud rate
  // divisor = clk_freq / (16 * Baud)
  *(uart_base_ptr + UART_DLL) = 25*1000*1000u / (16u * 115200u) % 0x100u;
  *(uart_base_ptr + UART_DLM) = 25*1000*1000u / (16u * 115200u) >> 8;

  // 8-bit data, 1-bit odd parity
  *(uart_base_ptr + UART_LCR) = 0x000Bu;
}

void uart_send(uint8_t data) {
  // wait until THR empty
  while(! (*(uart_base_ptr + UART_LSR) & 0x40u));
  *(uart_base_ptr + UART_THR) = data;
}

UART_BASE is the memory mapped base address of your peripheral.

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[Anton Krug]

You should be able to implement your own 

ssize_t _write(int fd, const void* ptr, size_t len)

and leave the original printf to use it, you only need to implement your UART driver to output a character.

You could even detect if it's STDOUT_FILENO or STDERR_FILENO and maybe send stderr on different uart if you would wish to.

Btw your compiler is using newlib?

[Guy Lemieux]

This isn't a RISC-V issue -- this is a general computer systems issue.

Unless it has to do with RISC-V specifically, this forum is inappropriate.

Sincerely,
Guy

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[Anton Krug]

hw-dev for sure, but it doesn't fell that offtopic to me that it wouldn't be answered on the sw-dev riscv forum.

Or download SoftConsole, it contains examples where the printf can be enabled/disabled with one #define as pass-through to the UART.

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[Satyajit Bora]

Thanks a lot Anton Krug for your valuable suggestions. Now, I am getting some idea to proceed.

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