Question about experimenting with RISC-V P extension (toolchain / simulator)

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Thang Trang

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Mar 9, 2026, 6:50:55 AM (2 days ago) Mar 9
to RISC-V SW Dev

Hi,

I'm a final-year student working on my undergraduate thesis related to the RISC-V Packed SIMD P extension.

I'm currently studying the draft specification "Preliminary in-progress RISC-V P Extension Version 0.12-draft (2026-03-08)" and trying to build a small experimental environment to understand and test some of the instructions.

I would like to ask:

  1. Is there any Spike, Sail, or QEMU implementation that supports the P extension?

  2. If not, what would be the recommended starting point to prototype these instructions?

  3. Is modifying Spike decode tables and instruction semantics a reasonable approach for experimentation?

My goal is only to run small test programs and study the behavior of packed SIMD instructions for my thesis.

Any suggestions or references would be greatly appreciated.

Thanks.

Rich Fuhler

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Mar 9, 2026, 8:14:22 AM (2 days ago) Mar 9
to Thang Trang, RISC-V SW Dev, Jiawei
Hi Thang,

Jiawei can best answer your questions. 



-rich


-------- Original message --------
From: Thang Trang <trangt...@gmail.com>
Date: 3/9/26 3:51 AM (GMT-08:00)
To: RISC-V SW Dev <sw-...@groups.riscv.org>
Subject: [sw-dev] Question about experimenting with RISC-V P extension (toolchain / simulator)

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Thang Trang

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Mar 9, 2026, 8:35:52 AM (2 days ago) Mar 9
to RISC-V SW Dev, Rich Fuhler, Thang Trang, Jiawei

Hi Rich,

Thanks for the pointer.

Hi Jiawei, if you're on this thread, I would really appreciate any insights you might have regarding experimentation with the RISC-V P extension.

Best regards,
-Thang


Vào lúc 19:14:22 UTC+7 ngày Thứ Hai, 9 tháng 3, 2026, Rich Fuhler đã viết:

Thang Trang

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Mar 9, 2026, 10:49:48 PM (2 days ago) Mar 9
to Jiawei, Rich Fuhler, RISC-V SW Dev

Hi Jiawei,

Thank you for your response and for sharing the QEMU implementation.

I noticed that in the QEMU repository (dev-p-018 branch) the P extension seems to follow version 0.18. However, when I checked the RISC-V P extension specification at https://github.com/riscv/riscv-p-spec, the latest version I could find is v0.12.

Could you please let me know where I can find the specification for version 0.18, or if there is a draft available somewhere?

Thank you very much for your help.

Best regards,
Thang


On Tue, Mar 10, 2026 at 9:06 AM Jiawei <jia...@iscas.ac.cn> wrote:

Hi Tang,


We have implemented the QEMU supports for P extension.

You can check it in https://github.com/mollybuild/qemu/tree/dev-p-018

Since I'm not an expert for simulator part, maybe you can ask the committer in QEMU repo.


Best,
Jiawei

Thang Trang

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Mar 10, 2026, 9:44:49 AM (yesterday) Mar 10
to Jiawei, Rich Fuhler, RISC-V SW Dev
Hi Jiawei

Thank you very much for the clarification and the references.  

BR,
Thang

On Tue, Mar 10, 2026 at 3:43 PM Jiawei <jia...@iscas.ac.cn> wrote:

Hi Tang,


Sorry for not explain the version clearly, the QEMU is implemented based on John Hauser's document https://www.jhauser.us/RISCV/ext-P/

And RISC-V P extension specification at github https://github.com/riscv/riscv-p-spec is also base form John Hauser's document.

The encoding and description are the same but github version is using ascii for review.


BR,

Jiawei

Thang Trang

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1:02 PM (1 hour ago) 1:02 PM
to RISC-V SW Dev, Thang Trang, RISC-V SW Dev, Jiawei

Hi Jiawei, hi everyone,

Following the previous discussion, I am trying to build a RISC-V GNU toolchain with P-extension (Packed SIMD) support for small experiments.

However, the build fails during the GCC stage with an internal compiler error.

Error

<built-in>: internal compiler error: in c_builtin_function, at c/c-decl.cc:4916

0x2f82966 internal_error(char const*, ...)

 

make[2]: *** [gcc/c/Make-lang.in:152: s-selftest-c] Error 1

make[1]: *** [Makefile:4713: all-gcc] Error 2

make: *** [Makefile:654: stamps/build-gcc-newlib-stage1] Error 2

Host system

OS: Ubuntu 22.04.5 LTS (jammy)
Kernel: Linux 6.8.0-101-generic
Architecture: x86_64

Host compiler:

gcc 11.4.0 (Ubuntu 11.4.0-1ubuntu1~22.04.3)

g++ 11.4.0

P-extension repositories used

According to the README of the RISC-V P-extension specification:

P-extension spec: https://github.com/riscv/riscv-p-spec

Toolchain components used:

GCC (p-dev branch) v0.18 gcc:https://github.com/ruyisdk/riscv-gcc/tree/p-dev

Binutils (p-dev branch) v0.18 binutils: https://github.com/ruyisdk/riscv-binutils/tree/p-dev

GNU toolchain repositories tested

I tried several toolchain bases:

git clone https://github.com/riscv-collab/riscv-gnu-toolchain.git

git clone https://github.com/TelGome/riscv-gnu-toolchain.git

git clone https://github.com/pz9115/riscv-gnu-toolchain.git

Configure command

../configure \

--prefix=/home/thang/Workspace/01_Verify/tools/riscv-p-toolchain2 \

--with-arch=rv32im \

--with-abi=ilp32 \

--with-gcc-src=$(pwd)/../riscv-gcc-p \

--with-binutils-src=$(pwd)/../riscv-binutils-p

I also tried:

--with-arch=rv32imp

Build command

make -j3 --output-sync=target 2>&1 | tee build.log

Questions

  1. Is the gcc-p-dev repository still compatible with current riscv-gnu-toolchain?
  2. Does the P-extension require a specific GCC version or toolchain fork?
  3. Has anyone successfully built a toolchain supporting rv32imp recently?
  4. Could this internal compiler error be caused by version mismatch between gcc-p-dev and the current toolchain?

Any guidance or references would be greatly appreciated.

Best regards,

Thang

Vào lúc 20:44:49 UTC+7 ngày Thứ Ba, 10 tháng 3, 2026, Thang Trang đã viết:
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