Rounding instruction?

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Matt Turner

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May 6, 2016, 12:18:55 AM5/6/16
to RISC-V ISA Dev
I like the design choice to allow a static rounding mode to be specified in floating-point instructions. I expected to see a "FROUND" instruction or similar, that when combined with the static rounding mode would be used to implement the libm functions trunc(), ceil(), floor(), and round(). But as far as I can tell no such instruction exists, and the FMV/FCVT instructions move data to integer registers and the FSGNJ family of instructions just moves bits around.

Alpha, which also has the same static rounding mode ability, can nearly implement trunc(x) by adding (with round to zero) 2**23 to x and then subtracting 2**23, but it doesn't work for x >= 2**23.

Am I missing an obvious implementation of the libm rounding functions?

kr...@berkeley.edu

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Mar 1, 2017, 10:09:00 AM3/1/17
to Matt Turner, RISC-V ISA Dev

Matt,

While checking over old emails for ISA issues, realized no-one had
replied to this, even though we had a long internal discussion.

The outcome was that ROUND can be optimized to need few instructions
in common cases, and not too many instructions in other cases, and I
believe we now have an improved library routine that does this. It
(round to integer in floating-point format) just doesn't seem common
enough to justify dedicated instructions and functional unit hardware.

Krste
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Alex Bradbury

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Mar 1, 2017, 12:00:03 PM3/1/17
to Krste Asanovic, Matt Turner, RISC-V ISA Dev
On 1 March 2017 at 15:08, <kr...@berkeley.edu> wrote:
>
> Matt,
>
> While checking over old emails for ISA issues, realized no-one had
> replied to this, even though we had a long internal discussion.
>
> The outcome was that ROUND can be optimized to need few instructions
> in common cases, and not too many instructions in other cases, and I
> believe we now have an improved library routine that does this. It
> (round to integer in floating-point format) just doesn't seem common
> enough to justify dedicated instructions and functional unit hardware.

Interestingly, ARM recently saw fit to add an instruction for one
rounding case: double precision fp to a signed 32-bit integer,
rounding to zero and setting a flag to indicate if the value could be
precisely represented by a 32-bit int
https://community.arm.com/processors/b/blog/posts/armv8-a-architecture-2016-additions.
The motivation was primarily for JavaScript and similar runtimes. I
suppose it will be some time before we see any ARMv8.3 hardware, but
it would be interesting to see what sort of achievable speedup
motivated this addition.

Best,

Alex

Matt Turner

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Mar 1, 2017, 12:06:14 PM3/1/17
to kr...@sifive.com, RISC-V ISA Dev
On Wed, Mar 1, 2017 at 7:05 AM, <kr...@sifive.com> wrote:
>
> Matt,
>
> While checking over old emails for ISA issues, realized no-one had
> replied to this, even though we had a long internal discussion.
>
> The outcome was that ROUND can be optimized to need few instructions
> in common cases, and not too many instructions in other cases, and I
> believe we now have an improved library routine that does this. It
> (round to integer in floating-point format) just doesn't seem common
> enough to justify dedicated instructions and functional unit hardware.

Thanks for the reply.

Is the library routine available somewhere for me to read?

kr...@berkeley.edu

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Mar 1, 2017, 12:32:23 PM3/1/17
to Alex Bradbury, Krste Asanovic, Matt Turner, RISC-V ISA Dev

Javascript Adjust to Integer

Krste

Andrew Waterman

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Mar 1, 2017, 1:36:42 PM3/1/17
to Matt Turner, kr...@sifive.com, RISC-V ISA Dev

for one example.

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Roger Espasa

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Mar 1, 2017, 2:20:09 PM3/1/17
to Andrew Waterman, Matt Turner, kr...@sifive.com, RISC-V ISA Dev
+1 support on that FROUND instruction. 

roger.

On Wed, Mar 1, 2017 at 7:36 PM, Andrew Waterman <wate...@eecs.berkeley.edu> wrote:
On Wed, Mar 1, 2017 at 9:06 AM Matt Turner <matt...@gmail.com> wrote:
On Wed, Mar 1, 2017 at 7:05 AM,  <kr...@sifive.com> wrote:
>
> Matt,
>
> While checking over old emails for ISA issues, realized no-one had
> replied to this, even though we had a long internal discussion.
>
> The outcome was that ROUND can be optimized to need few instructions
> in common cases, and not too many instructions in other cases, and I
> believe we now have an improved library routine that does this.  It
> (round to integer in floating-point format) just doesn't seem common
> enough to justify dedicated instructions and functional unit hardware.

Thanks for the reply.

Is the library routine available somewhere for me to read?

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Sean Halle

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Mar 3, 2017, 8:27:13 AM3/3/17
to Roger Espasa, Andrew Waterman, Matt Turner, kr...@sifive.com, RISC-V ISA Dev

This may be a rather unpopular view, please accept my apologies.  We are focusing on streamlining and simplifying the cores to an extreme, while increasing the clock speed and issue width.  The cores are used for computation and are being stripped of as much OS support and any other features that we can possibly shed.  Details of how we do it aside, the reason for mentioning it here is to provide an existence proof of designs that would "suffer" from a large number of rare instructions.  

Feature creep is such a seductive thing..  ARM may be a good example.. and once that instruction is in there, taking it back out again..  tends to not happen.  Our preferences tend to lean towards the side of restraint.  If needed, adding the relatively rare instructions like this to optional extensions seems like the way to go, leaving designers free to not include them without losing compatibility.

Thanks for the discussion. Best,

Sean
Intensivate




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On Wed, Mar 1, 2017 at 11:20 AM, Roger Espasa <roger.espasa@esperantotech.com> wrote:
+1 support on that FROUND instruction. 

roger.
On Wed, Mar 1, 2017 at 7:36 PM, Andrew Waterman <wate...@eecs.berkeley.edu> wrote:
On Wed, Mar 1, 2017 at 9:06 AM Matt Turner <matt...@gmail.com> wrote:
On Wed, Mar 1, 2017 at 7:05 AM,  <kr...@sifive.com> wrote:
>
> Matt,
>
> While checking over old emails for ISA issues, realized no-one had
> replied to this, even though we had a long internal discussion.
>
> The outcome was that ROUND can be optimized to need few instructions
> in common cases, and not too many instructions in other cases, and I
> believe we now have an improved library routine that does this.  It
> (round to integer in floating-point format) just doesn't seem common
> enough to justify dedicated instructions and functional unit hardware.

Thanks for the reply.

Is the library routine available somewhere for me to read?

--
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