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Regardless of what any specify toolchain does in practice, isn't the key issue here the inaccuracy/discrepancy in the spec that is alleged in the first post?
> The RISC-V spec justifies the semantics of auipc+jalr by that it enables code to jump anywhere in a 32-bit offset relative to the PC.
Is there a flaw in the spec that needs to be addressed or clarified?
Thanks Andrew.I was just looking for clarity/clarification.
From: Andrew Waterman <and...@sifive.com>
Sent: Monday 6 April 2020 04:35
To: Tommy Murphy <tommy_...@hotmail.com>
Cc: Nick Knight <nick....@sifive.com>; Luke Nelson <luke...@gmail.com>; RISC-V ISA Dev <isa...@groups.riscv.org>
Subject: Re: [isa-dev] auipc+jalr pairs for offsets close to S32_MAX on RV64
On Sun, Apr 5, 2020 at 8:04 PM Tommy Murphy <tommy_...@hotmail.com> wrote:
Regardless of what any specify toolchain does in practice, isn't the key issue here the inaccuracy/discrepancy in the spec that is alleged in the first post?
I was obliquely pointing out that this fact is not a secret.
> The RISC-V spec justifies the semantics of auipc+jalr by that it enables code to jump anywhere in a 32-bit offset relative to the PC.
Is there a flaw in the spec that needs to be addressed or clarified?
Not a flaw, but deserving of clarification anyway. The quote is from the RV32 chapter, where it's actually a true statement. Furthermore, it's commentary, not normative text; the semantics of the instructions are not in question. I'm proposing adding the following note below the definition of AUIPC in the RV64 chapter:
\begin{commentary}
Note that the set of addresses or offsets that can be accessed by pairing LUI
with LD, AUIPC with JALR, etc. in RV64 include all signed 32-bit offsets
except for the range [$2^{31}{-}2^{11}$, $2^{31}{-}1$].
\end{commentary}
From: Andrew Waterman <and...@sifive.com>
Sent: Monday, April 6, 2020 3:19:46 AM
To: Nick Knight <nick....@sifive.com>
Cc: Luke Nelson <luke...@gmail.com>; RISC-V ISA Dev <isa...@groups.riscv.org>
Subject: Re: [isa-dev] auipc+jalr pairs for offsets close to S32_MAX on RV64
Note that binutils handles this limitation correctly. If you try placing a callee 0x7ffff7fe bytes past its call site, it works for both RV32 and RV64, whereas a displacement of 0x7ffff800 works for RV32 but issues a link error for RV64.
On Sat, Apr 4, 2020 at 3:10 PM Nick Knight <nick....@sifive.com> wrote:
Hi Luke,
Interesting! It looks to me like offsets 0x7ffff800 through 0x7fffffff are unobtainable by auipc+jalr in RV64I (of course, only the even offsets are relevant). I wonder if there are other holes.
In this case, I think it can be remedied by reducing the jalr immediate below 0x800 and compensating with an addi to the auipc result. Of course, the ISA manual doesn't mention a need for an extra instruction.
Curious to hear what others think.
Best,Nick Knight
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I'm proposing adding the following note below the definition of AUIPC in the RV64 chapter:\begin{commentary}
Note that the set of addresses or offsets that can be accessed by pairing LUI
with LD, AUIPC with JALR, etc. in RV64 include all signed 32-bit offsets
except for the range [$2^{31}{-}2^{11}$, $2^{31}{-}1$].
\end{commentary}
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Here is a different way of looking at this: with H = 0xFFFFFFFF80000000 and L = -2 you can jump by 0xFFFFFFFF7FFFFFFE. This is obviously outside the range -2^{31} <= A < 2^{31}. Because 20 bits + 12 bits are 32 bits, there are only 2^32 possible immediate combinations, thus not enough combinations for everything in the range -2^{31} <= A < 2^{31} if there are immediate combinations that code for something outside of that range.
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