[Zicfiss] Should SSPOPCHK set the D bit in the PTE?

[Oscar Jupp]

Hi all,

I have a question about the interaction between SSPOPCHK (Zicfiss) and the
page-table-walk A/D bit management (priv spec, step 9 of the translation
algorithm).

Step 9 checks "if the original memory access is a store and pte.d=0" to
determine whether to raise a page fault (Svade) or update the D bit (Svadu).

SSPOPCHK only performs a load from the shadow stack (the spec explicitly
states it "only read[s] from memory and do[es] not write to it"). However,
shadow stack instructions report faults as store/AMO type and require
read-write permission in PMP and G-stage.

The question: for the purpose of step 9, is SSPOPCHK's memory access
considered "a store" (requiring D=1), or is it treated as a load (only
requiring A=1)?

If it is not a store for D-bit purposes, then SSPOPCHK and SSPUSH would
differ in this regard — SSPUSH would require D=1 (actual store) while
SSPOPCHK would not.

I could not find an explicit statement in the spec or prior discussion on
this point. Any clarification would be appreciated.

Thanks,
Oscar Jupp

[Andrew Waterman]

Nope, even though it raises store exceptions, it is still considered a load for most purposes--not just the D bit, but also things like the memory consistency model.

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[Oscar Jupp]

Thanks Andrew, that's very clear. Appreciate the quick reply. 

Oscar