confusion on ClockDivider in the rocket chip code

50 views
Skip to first unread message

Jerry Ho

unread,
Nov 10, 2020, 7:58:38 PM11/10/20
to RISC-V HW Dev
I am reading the rocketchiop code now, and have a little confusion on this block comment of the ClockDivider2 class:
This black-boxes a Clock Divider by 2. The output clock is phase-aligned to the input clock. If you use this in synthesis, make sure your sdc declares that you want it to do the same.
Because Chisel does not support blocking assignments, it is impossible to create a deterministic divided clock.

my condusion is that what is the deisgn consideration of  not supporting the blocking assignments? and why it is impossible to create a deterministic divides clock by the non-blocking assignment? 
Also a stupid question, What is the sdc, I am a software guy, I hope my confusion doesn't make me silly! Thanks!

Hogege NaN

unread,
Nov 11, 2020, 12:45:56 AM11/11/20
to Jerry Ho, RISC-V HW Dev
Hi Ho-san,


Let see this article; introduction to SDC;

Best,
S.Takano

2020/11/11 9:58、Jerry Ho <jerry...@gmail.com>のメール:

--
You received this message because you are subscribed to the Google Groups "RISC-V HW Dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email to hw-dev+un...@groups.riscv.org.
To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/hw-dev/780d2b52-712e-456d-bafe-65cb9e408b25n%40groups.riscv.org.

Reply all
Reply to author
Forward
0 new messages