Are vector register numbers defined in GDB?

[Lifang Xia]

Hi all,

We are tring to debug the vector behaviors, but I can't found the vector register numbers in GDB.

Is there a plan for this now?

[Jim Wilson]

On Sun, Jan 5, 2020 at 10:38 PM Lifang Xia <xialf....@gmail.com> wrote:
> We are tring to debug the vector behaviors, but I can't found the vector register numbers in GDB.
> Is there a plan for this now?

No. We need dwarf register numbers to be proposed first, and then gdb
patches to make use of them, and as far as I know no one is working on
this. We are also missing the binutils, gcc, clang, etc patches to
use them too. The complete list of registers including the csrs are
still changing, so it may be premature for official psabi support, but
a working proposal, and then patches based off of them would be OK for
now.

Jim

[jiangshuai li]

Hi,  Jim Wilson

About "dwarf register numbers"：

As i konwn，for debug info, the dwarf regnum may be not  the same as the gdb regnum, it just need to be remapped to the gdb regnum and gdb code has the interface for architectures to implement it. 

If the locations of some variables are in part of a vector register, then a group of pseudo registers should be added. The value of these pseudo registers are Vx[0] or Vx[1] .... Here, we should add Vector regnum to gdb first.

About "csr regnum"：

If the opcodes of csrr, csrw... have already fixed, the max count of csr registers is fixed. A regnum in csr registers is used for what， gdb does not care about。

About "The complete list of registers including the csrs are still changing":

We all known riscv-gdb has been pubulished to binutils-gdb.  If the complete list of registers is still changing, it does not matter. But if we add some new registers to gdb regnum, like vectors, they should be added after the last csr regnum, or

we will have some incompatibility problems.

It is predictable for vector supporting, and it has 32 vector registers. We can also preset the first vector gdb regnum to 4162 (the last csr regnum +1 ), and the last vector gdb regnum to 4193.

在 2020年1月7日星期二 UTC+8上午12:51:22，Jim Wilson写道：

[Sober Liu]

For vregs, maybe another choice is to map them to memory in GDB?

 

From: jiangshuai li <lijia...@gmail.com>
Sent: Wednesday, January 8, 2020 10:42 AM
To: RISC-V SW Dev <sw-...@groups.riscv.org>
Cc: xialf....@gmail.com
Subject: Re: [sw-dev] Are vector register numbers defined in GDB?

 

External email: Use caution opening links or attachments

 

--
You received this message because you are subscribed to the Google Groups "RISC-V SW Dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email to sw-dev+un...@groups.riscv.org.
To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/a5ae0904-4eca-47e0-8f13-54d3f464f9d0%40groups.riscv.org.

---

This email message is for the sole use of the intended recipient(s) and may contain confidential information.  Any unauthorized review, use, disclosure or distribution is prohibited.  If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message.

---

[Jim Wilson]

On Tue, Jan 7, 2020 at 6:57 PM Sober Liu <sob...@nvidia.com> wrote: 

About "dwarf register numbers"：

We have already defined dwarf register numbers for the CSRs.  They are the CSR regnum plus 4096.  And some support for this has already been added to gdb.  There is a range of numbers reserved for vendor extensions.  And there is a large range currently unused between the end of the FP registers and the range reserved for vendor extensions.  See the psabi.

    https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#dwarf-register-numbers

In general, there is a shortage of people helping with gdb development work, and a shortage of people helping with vector toolchain work, and the vector extension is still changing, so it is unlikely anything much will happen in this area anytime soon, and if anything does happen it will have to remain unofficial until the vector extension gets finalized.  But meanwhile we can pick any group of numbers between 65 and 3071 inclusive to use for the vector registers, and we can change this later if necessary if the vector extension changes or if other extensions that add registers get approved before the vector extension, etc.

Jim

[jiangshuai li]

Ok，i know what you mean, but the psabi seems lost part of gdb regitser numbers or the definition below should be described at any Debug Spec.

All what i said is  how to add regnums to gdb, these regnums will be used for GDB regcache. like:

x0~x31 are 0 ~ 31,

pc is 32,

ft0~f31 are 33 ~ 64,

csr0 is 65, the csr_last is 4161.

They have fixed regnums in gdb, and the regnums are used for gdb remote protocol for exchanging values of every register. The debug-servers, like gdbserver, openocd, qemu... , get a regnum,  know which register is specified.

When we add vector support, 4162 may be the first regnum of V0.

The way to convert the dwarf regnums to the gdb regnums is to implement the gdb architecture interface: set_gdbarch_dwarf2_reg_to_regnum.

在 2020年1月8日星期三 UTC+8下午12:54:00，Jim Wilson写道：