Another historical question
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Jack Rubin
Jun 17, 2019, 8:06:20 PM6/17/19
to p...@d.umn.edu
What was the origin of the auto-incrementing registers (10-17 octal) for the 8? They’re in the PDP-5 but I don’t think either the LINC or the CDC160 had them. Was this an Edson de Castro innovation? Any idea about the source or inspiration?
Thanks,
Jack
CLASystems
Jun 18, 2019, 3:52:45 AM6/18/19
to Jack Rubin, p...@d.umn.edu
Hi Jack! We haven't spoken for a bit.
Actually, it DOES originate in the LINC.
LINC mode addressing is 10 bits not 12-bits, and there are several forms of addressing in a whole class of instructions that use so-called beta registers, which are defined as 0001-0017.
The two immediate modes of addressing are not relevant' either the operand follows the instruction or a pointer to the operand follows. For the setting where the bits are set to any non-zero setting, then the pointer address is the specified 0001 through 0017. For the benefit of other issues, such as a far better subroutine call, very different treatment of location zero, and the addition of PDP-8 interrupts, it is necessary to make locations less than 7 or more than 0017 be page zero locations, thus, the list was shortened to 10-17.
Actually,in the abstract, the LINC is "better" because you can use these locations as NON-auto-incremented pointers or auto-incremented pointers as you wish. Thus, it is legitimate to use ADA 17 which the PDP-8 has no equivalent to while you also have ADA I 17 which works identically to the PDP-8 except ADD is one's complement and TAD literally emphasizes that it means two's complement. The LINC predates two's complement designs, but this is an independent part of the comparison.
Also, the LINC is a 1K machine with 10-bit addressing and lacks the concept of a page zero which the 160 sorta has. It (the 160) also has relative addressing such as is found in the Nova or the 27-bit FPP package as used in Lenny Elekman's 4K BASIC and its descendant 8K BASIC/LAB-8/E BASIC which includes 8K modifications to be a more practical product.
A late stage modification of the LINC raises the memory to a total of 2K, but strictly accessible only by certain data addressing modes, never any instructions there, but they realized this was necessary to perform such as character display and graphics, etc. The LINC-8 adds the notion of the upper and lower memory banks [call them SEGMENTS] that can be set so the LINC-8 represented a 3 bank machine or a 7 bank machine because segment 0 is reserved for PROGOFOP the trap simulator to fix up for what the hardware totally lacks. The PDP-12 allows all possibilities because all the hardware is real, etc. Also, there is one more bit of precision on the VR12/14 display, so you have small and large characters; the LINC-8 only has large, and the display has twice as many bits of resolution, which while nice is not a deal-breaker. In essence, the LINC and LINC-8 design begat the AX08 in terms of A-D and D-A implementation in a PDP-8 peripheral, etc.
Thus, this clearly derives from the LINC, and we have to always use the auto-increment form, or else expect to selectively increment when needed. But the overall compromise is far better for the PDP-8. PDP-12 users can choose whichever is best at the moment because it's the only model you can intermix the code by mode switching with the LINC and PDP instructions, etc. All LINC-8 programming is strictly separate, and the LINC doesn't have PDP-8 mode at all.
cjl
Actually, it DOES originate in the LINC.
LINC mode addressing is 10 bits not 12-bits, and there are several forms of addressing in a whole class of instructions that use so-called beta registers, which are defined as 0001-0017.
The two immediate modes of addressing are not relevant' either the operand follows the instruction or a pointer to the operand follows. For the setting where the bits are set to any non-zero setting, then the pointer address is the specified 0001 through 0017. For the benefit of other issues, such as a far better subroutine call, very different treatment of location zero, and the addition of PDP-8 interrupts, it is necessary to make locations less than 7 or more than 0017 be page zero locations, thus, the list was shortened to 10-17.
Actually,in the abstract, the LINC is "better" because you can use these locations as NON-auto-incremented pointers or auto-incremented pointers as you wish. Thus, it is legitimate to use ADA 17 which the PDP-8 has no equivalent to while you also have ADA I 17 which works identically to the PDP-8 except ADD is one's complement and TAD literally emphasizes that it means two's complement. The LINC predates two's complement designs, but this is an independent part of the comparison.
Also, the LINC is a 1K machine with 10-bit addressing and lacks the concept of a page zero which the 160 sorta has. It (the 160) also has relative addressing such as is found in the Nova or the 27-bit FPP package as used in Lenny Elekman's 4K BASIC and its descendant 8K BASIC/LAB-8/E BASIC which includes 8K modifications to be a more practical product.
A late stage modification of the LINC raises the memory to a total of 2K, but strictly accessible only by certain data addressing modes, never any instructions there, but they realized this was necessary to perform such as character display and graphics, etc. The LINC-8 adds the notion of the upper and lower memory banks [call them SEGMENTS] that can be set so the LINC-8 represented a 3 bank machine or a 7 bank machine because segment 0 is reserved for PROGOFOP the trap simulator to fix up for what the hardware totally lacks. The PDP-12 allows all possibilities because all the hardware is real, etc. Also, there is one more bit of precision on the VR12/14 display, so you have small and large characters; the LINC-8 only has large, and the display has twice as many bits of resolution, which while nice is not a deal-breaker. In essence, the LINC and LINC-8 design begat the AX08 in terms of A-D and D-A implementation in a PDP-8 peripheral, etc.
Thus, this clearly derives from the LINC, and we have to always use the auto-increment form, or else expect to selectively increment when needed. But the overall compromise is far better for the PDP-8. PDP-12 users can choose whichever is best at the moment because it's the only model you can intermix the code by mode switching with the LINC and PDP instructions, etc. All LINC-8 programming is strictly separate, and the LINC doesn't have PDP-8 mode at all.
cjl
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Maury Pepper
Aug 23, 2019, 1:52:38 PM8/23/19
to p...@d.umn.edu
I was traveling when this thread started so please excuse the tardy
response.
I think Charles did a great job of explaining the LINC's index-class instructions. I have a few comments to add.
With regard to the classic LINC, the term "auto-index" was never used. I first ran across that term with the PDP-5. I always took the term to mean that using an auto-index register implied indexing occurred unconditionally. As Charles explained, with the LINC, indexing was optional depending on one bit in the instruction referred to as the i-bit. The difference being more of semantics than anything else. My interpretation had been that the term meant that indexing occurs only as a function of the address and not based on addressing modes determined by the instruction. I won't argue with the definition that says indexing occurs as a side effect of fetching an operand address.
BTW, indexing (of the latter definition) was an addressing mode of the Programmed Console -- a LINC-ish, 4K, Flip-Chip computer designed in 1966 at Washington U. It was commercialized as the Artronix PC12.
-maury-
I think Charles did a great job of explaining the LINC's index-class instructions. I have a few comments to add.
With regard to the classic LINC, the term "auto-index" was never used. I first ran across that term with the PDP-5. I always took the term to mean that using an auto-index register implied indexing occurred unconditionally. As Charles explained, with the LINC, indexing was optional depending on one bit in the instruction referred to as the i-bit. The difference being more of semantics than anything else. My interpretation had been that the term meant that indexing occurs only as a function of the address and not based on addressing modes determined by the instruction. I won't argue with the definition that says indexing occurs as a side effect of fetching an operand address.
BTW, indexing (of the latter definition) was an addressing mode of the Programmed Console -- a LINC-ish, 4K, Flip-Chip computer designed in 1966 at Washington U. It was commercialized as the Artronix PC12.
-maury-
--
CLASystems
Aug 24, 2019, 11:00:33 AM8/24/19
to Maury Pepper, PDP-12 Restoration Project
Remember I came into this in the "straight" PDP-8 era with the extremely important guidance of the five most gifted PDP-8 (and other things) programmers ever. Today, many falsely attribute some of that to me; i am now pretty close to where they already were, and only on 12-bit projects [but I do know quite a lot about PCs and Windows many have no idea even exists) so I can safely say, I have "caught up" to them in that sense. P?S/8 is the byproduct of all of the above and my association with what we are calling the "second generation" of PDP-8 software people, etc. Of course I can say I am clearly the most active player today in that I am developing TODAY programming for these machines whether simulated or real, etc. While I can relate to what Maury is saying, I had to "backfill" my knowledge, and in fact my "order' is PDP-8 first, then PDP-12, then PDP-8/L, then PDP-8/E then LINC-8 then PDP-8/A and DECmates.
The terminology is what DEC called the function, although I do know enough that other architecture reserve these terms for a more direct definition of the terms as generally used.
The terminology is what DEC called the function, although I do know enough that other architecture reserve these terms for a more direct definition of the terms as generally used.
The PDP-8 terminology is derived from the fact that typical programming the index registers are used on machines that have them is done by the "magic" attribute of the special addressing of the auto-index registers when implementing the same or similar routines on these machines. You don't even in theory need it at all,, but then all routines would be quite cumbersome, and this effect can be seen in some much later microprocessors, as each design either cleverly or muddle-headedly tries to produce something that "works" well enough, but might stumble compared to previous designs.
The PDP-8 has the advantage of the benefit of all that happened before to not make the same mistakes, and in this case to take advantage of a feature unique to the LINC up until that point. In many ways.the LINC appears to be the victim of "too many cooks' and it even has a single instruction that is two's complement despite all others being one's complement. From my vantage point is it is not a machine meant to be practical, but rather to just see what happens in terms of programming. It is certainly not any form of "RISC" machine, and I can argue it is incomplete because there is no divide instruction. I still cannot get my head wrapped around what the multiple does when you set the I bit on, but it is clearly not any form of division. Arguably it could have meant that very notion perhaps. [All of this notwithstanding the physical miniaturization compared to machine-room raised floor and heavy air-conditioning from the previous "big iron" era.]
The PDP-8 is successful because it is a "guerilla warfare" machine filled with tricks. For example, despite the lack of a LAC or similar instruction as in the PDP-7/9/15, it is hardly ever true that the DCA clearing the accumulator is a PITA, Simply true that the notion of the clear after storing is very helpful. That means that TAD is the equivalent of a load operation because it is already pre-cleared. Practical PDP-8 code is NOT filled with "fixup" TAD instructions to counter this, rather it is embraced. [Yes, every once in a while. I have written over a million lines of code. This came up I think about FOUR times!]
That said, this was also born in the LINC. The direct addressing had ADD [ignore that these are one's complement] and STC [store then clear the accumulator] If anything this justifies my "too many cooks" notions because if this is the "true way to go".then why also have the more typical way as well.
in any case, the PDP-8 took a few notions from the LINC and also even less from the CDC 160, where the notion of the concept of a subroutine is a seriously difficult and contrived event [to have ONE!] The LINC gets it better but has housekeeping issues because JMP is both an unconditional jump and a poor-mans' subroutine call.. The PDP-12 even added the DJR instruction to minimize the damage, but no LINC architecture does this without the need for fixup; several ways around that from such as copying the JMP in location 0 to elsewhere when exiting to using the SET instruction to copy it to one f the other Alpha registers, etc. [Alpha is the same as Beta but includes 0, Beta leaves 0 out] Also, a nightmare to implement co-routines which are totally elegant on the PDP-8 [not that anyone back then had this in mind!].
The PDP-8 has the advantage of the benefit of all that happened before to not make the same mistakes, and in this case to take advantage of a feature unique to the LINC up until that point. In many ways.the LINC appears to be the victim of "too many cooks' and it even has a single instruction that is two's complement despite all others being one's complement. From my vantage point is it is not a machine meant to be practical, but rather to just see what happens in terms of programming. It is certainly not any form of "RISC" machine, and I can argue it is incomplete because there is no divide instruction. I still cannot get my head wrapped around what the multiple does when you set the I bit on, but it is clearly not any form of division. Arguably it could have meant that very notion perhaps. [All of this notwithstanding the physical miniaturization compared to machine-room raised floor and heavy air-conditioning from the previous "big iron" era.]
The PDP-8 is successful because it is a "guerilla warfare" machine filled with tricks. For example, despite the lack of a LAC or similar instruction as in the PDP-7/9/15, it is hardly ever true that the DCA clearing the accumulator is a PITA, Simply true that the notion of the clear after storing is very helpful. That means that TAD is the equivalent of a load operation because it is already pre-cleared. Practical PDP-8 code is NOT filled with "fixup" TAD instructions to counter this, rather it is embraced. [Yes, every once in a while. I have written over a million lines of code. This came up I think about FOUR times!]
That said, this was also born in the LINC. The direct addressing had ADD [ignore that these are one's complement] and STC [store then clear the accumulator] If anything this justifies my "too many cooks" notions because if this is the "true way to go".then why also have the more typical way as well.
in any case, the PDP-8 took a few notions from the LINC and also even less from the CDC 160, where the notion of the concept of a subroutine is a seriously difficult and contrived event [to have ONE!] The LINC gets it better but has housekeeping issues because JMP is both an unconditional jump and a poor-mans' subroutine call.. The PDP-12 even added the DJR instruction to minimize the damage, but no LINC architecture does this without the need for fixup; several ways around that from such as copying the JMP in location 0 to elsewhere when exiting to using the SET instruction to copy it to one f the other Alpha registers, etc. [Alpha is the same as Beta but includes 0, Beta leaves 0 out] Also, a nightmare to implement co-routines which are totally elegant on the PDP-8 [not that anyone back then had this in mind!].
Also, Edson De Castro took the auto-index registers with him so on that architectural point, the Nova is the same as the rest discussed here.
You can compare designing a computer architecture to a crap game. Sometimes you get a good role of the dice, and sometimes not so good.
cjl
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