[CoreCollective WoA] MSVC intrinsic in LLVM update

[Adhemerval Zanella Netto]

Hi all,

So here is a more detailed update of MSVC intrinsic work.

These are the one already merger:

* [aarch64] Add more MSVC intrinsics - https://github.com/llvm/llvm-project/pull/194632
* [AArch64] Access named allocatable registers via register-immediate pseudos - https://github.com/llvm/llvm-project/pull/200825/commits

These are the remaining ones that I could use some help on reviewing:

* [AArch64] Use the named-register pseudo only for allocatable registers - https://github.com/llvm/llvm-project/pull/203037
* [AArch64] Add __hvc, __svc and _InterlockedCompareExchangePointer_nf MS intrinsics - https://github.com/llvm/llvm-project/pull/202582
* [AArch64] Add MS atomic and exclusive-access intrinsics - https://github.com/llvm/llvm-project/pull/202416

I think PR#202582 should not be a problem, hvc/svc are on the baseline ISA and
_InterlockedCompareExchangePointer_nf is a missing from an already implemented
set of builtins.

For the atomic work I have opened a Discourse thread [1], so any feedback will
be welcomed. I am working on implementing Eli Friedman suggestion to emit the
.asm directive automatically, but I think I will wait for some feedback before
sending a new update.

[1] https://discourse.llvm.org/t/rfc-aarch64-msvc-compatible-cas-swp-ldapr-intrinsics-that-emit-lse-rcpc-instructions-regardless-of-march/91093