Add 1.2GHz cpu clock support for T25 (issue6116004)

[jimm...@nvidia.com]

Reviewers: Olof Johansson, Allen Martin,

Message:
Changes made in code review is the first part of changes related to max cpu
clock rate change. The second part will be DVFS related tables update for
supporting new higher max rate. Since DVFS is still disabled in current
build,
the changes in DVFS will be made when DVFS is enabled in ChromeOS build.

Description:
Add 1.2GHz cpu clock support for T25

Change-Id: Ibb5d6f80f5a0dc91984b1bbbf4117a229a48a8a4

CHROMIUM: tegra: Add cpu frequence table for T25.

BUG=None
TEST=Did unit test on both T20 and T25 seaboard.

Signed-off-by: Jimmy Zhang <jimm...@nvidia.com>

Please review this at http://codereview.chromium.org/6116004/

SVN Base: http://git.chromium.org/git/kernel-...@chromeos-2.6.36

Affected files:
M arch/arm/mach-tegra/cpu-tegra.c
M arch/arm/mach-tegra/tegra2_clocks.c

Index: arch/arm/mach-tegra/cpu-tegra.c
diff --git a/arch/arm/mach-tegra/cpu-tegra.c
b/arch/arm/mach-tegra/cpu-tegra.c
index
035e1bc3146295894305a7dcf755ade742e7fcd3..371b41ed832f0957aef82055da48e69550454560
100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -36,8 +36,13 @@
#include <mach/hardware.h>
#include <mach/clk.h>

+#include "fuse.h"
+
+#define SKU_ID_T20 0x08
+#define SKU_ID_T25 0x18
+
/* Frequency table index must be sequential starting at 0 */
-static struct cpufreq_frequency_table freq_table[] = {
+static struct cpufreq_frequency_table freq_table_t20[] = {
{ 0, 216000 },
{ 1, 312000 },
{ 2, 456000 },
@@ -49,6 +54,21 @@ static struct cpufreq_frequency_table freq_table[] = {
{ 8, CPUFREQ_TABLE_END },
};

+static struct cpufreq_frequency_table freq_table_t25[] = {
+ { 0, 216000 },
+ { 1, 312000 },
+ { 2, 456000 },
+ { 3, 608000 },
+ { 4, 760000 },
+ { 5, 816000 },
+ { 6, 912000 },
+ { 7, 1000000 },
+ { 8, 1200000 },
+ { 9, CPUFREQ_TABLE_END },
+};
+
+static struct cpufreq_frequency_table *freq_table;
+
#define NUM_CPUS 2

static struct clk *cpu_clk;
@@ -192,6 +212,9 @@ static int tegra_cpu_init(struct cpufreq_policy *policy)
if (policy->cpu >= NUM_CPUS)
return -EINVAL;

+ freq_table = (tegra_sku_id() == SKU_ID_T25) ? freq_table_t25 :
+ freq_table_t20;
+
cpu_clk = clk_get_sys(NULL, "cpu");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
Index: arch/arm/mach-tegra/tegra2_clocks.c
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c
b/arch/arm/mach-tegra/tegra2_clocks.c
index
1622de8bd06510aa37a750234f287f1f4a71bdda..fe0e11f0d74793f2446e0f7eeb20191635c8ef71
100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -789,6 +789,7 @@ static int tegra2_pll_div_clk_set_rate(struct clk *c,
unsigned long rate)
unsigned long parent_rate = clk_get_rate(c->parent);

pr_debug("%s: %s %lu\n", __func__, c->name, rate);
+
if (c->flags & DIV_U71) {
divider_u71 = clk_div71_get_divider(parent_rate, rate);
if (divider_u71 >= 0) {
@@ -1513,6 +1514,12 @@ static struct clk tegra_pll_u = {
};

static struct clk_pll_freq_table tegra_pll_x_freq_table[] = {
+ /* 1.2 GHz */
+ { 12000000, 1200000000, 600, 6, 1, 12},
+ { 13000000, 1200000000, 923, 10, 1, 12},
+ { 19200000, 1200000000, 750, 12, 1, 8},
+ { 26000000, 1200000000, 600, 13, 1, 12},
+
/* 1 GHz */
{ 12000000, 1000000000, 1000, 12, 1, 12},
{ 13000000, 1000000000, 1000, 13, 1, 12},
@@ -1564,7 +1571,7 @@ static struct clk tegra_pll_x = {
.ops = &tegra_pllx_ops,
.reg = 0xe0,
.parent = &tegra_clk_m,
- .max_rate = 1000000000,
+ .max_rate = 1200000000,
.u.pll = {
.input_min = 2000000,
.input_max = 31000000,
@@ -1713,7 +1720,7 @@ static struct clk tegra_clk_cclk = {
.inputs = mux_cclk,
.reg = 0x20,
.ops = &tegra_super_ops,
- .max_rate = 1000000000,
+ .max_rate = 1200000000,
};

static struct clk tegra_clk_sclk = {
@@ -1731,7 +1738,7 @@ static struct clk tegra_clk_virtual_cpu = {
.name = "cpu",
.parent = &tegra_clk_cclk,
.ops = &tegra_cpu_ops,
- .max_rate = 1000000000,
+ .max_rate = 1200000000,
.u.cpu = {
.main = &tegra_pll_x,
.backup = &tegra_pll_p,

[ol...@chromium.org]

Hi,

Some comments below. Also, please prefix the first line with:

CHROMIUM: ARM: tegra: <Add 1.2...>

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/cpu-tegra.c
File arch/arm/mach-tegra/cpu-tegra.c (right):

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/cpu-tegra.c#newcode216
arch/arm/mach-tegra/cpu-tegra.c:216: freq_table_t20;
I would prefer to see this as a regular if/else.

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/tegra2_clocks.c
File arch/arm/mach-tegra/tegra2_clocks.c (right):

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/tegra2_clocks.c#newcode792
arch/arm/mach-tegra/tegra2_clocks.c:792:
Unrelated change, please discard

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/tegra2_clocks.c#newcode1574
arch/arm/mach-tegra/tegra2_clocks.c:1574: .max_rate = 1200000000,
Is it safe to set max_rate here? Shouldn't you update it dynamically
when you detect T25 instead? (same for the other changes below).

http://codereview.chromium.org/6116004/

[jimm...@nvidia.com]

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/cpu-tegra.c
File arch/arm/mach-tegra/cpu-tegra.c (right):

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/cpu-tegra.c#newcode216
arch/arm/mach-tegra/cpu-tegra.c:216: freq_table_t20;

On 2011/01/12 01:05:28, Olof Johansson wrote:
> I would prefer to see this as a regular if/else.

Sure, I can change it to that way.

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/tegra2_clocks.c
File arch/arm/mach-tegra/tegra2_clocks.c (right):

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/tegra2_clocks.c#newcode792
arch/arm/mach-tegra/tegra2_clocks.c:792:
On 2011/01/12 01:05:28, Olof Johansson wrote:
> Unrelated change, please discard

will be removed.

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/tegra2_clocks.c#newcode1574
arch/arm/mach-tegra/tegra2_clocks.c:1574: .max_rate = 1200000000,

On 2011/01/12 01:05:28, Olof Johansson wrote:
> Is it safe to set max_rate here? Shouldn't you update it dynamically
when you
> detect T25 instead? (same for the other changes below).

The max value is still limited by the cpu frequency table. In case of
T20, the max rate will only be set to 1.0GHz.

http://codereview.chromium.org/6116004/

[ol...@chromium.org]

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/tegra2_clocks.c
File arch/arm/mach-tegra/tegra2_clocks.c (right):

http://codereview.chromium.org/6116004/diff/1/arch/arm/mach-tegra/tegra2_clocks.c#newcode1574

arch/arm/mach-tegra/tegra2_clocks.c:1574: .max_rate = 1200000000,

Ok, sounds good.

http://codereview.chromium.org/6116004/

[jimm...@nvidia.com]

Added additional code on this issue.

http://codereview.chromium.org/6116004/

[ol...@chromium.org]

Thanks, applied.

http://codereview.chromium.org/6116004/