[ipq806x] Boot command for U-Boot [chromiumos/third_party/u-boot : chromeos-v2013.06]

[Vadim Bendebury (Gerrit)]

Vadim Bendebury has uploaded a new change for review.

https://chromium-review.googlesource.com/192757

Change subject: [ipq806x] Boot command for U-Boot
......................................................................

[ipq806x] Boot command for U-Boot

* Added boot command to load uImage kernel from flash
* Added nss image loading support using bootm command

Signed-off-by: Vasanthan <c_vs...@codeaurora.org>
(cherry picked from commit 4a51353f4ee9520a6a56e5ea2f5c965c57af0eb2)

Change-Id: Ia4eef84ebe8ee7e948b96587bdb81d17cd16ad6f
---
M arch/arm/cpu/armv7/ipq/Makefile
A arch/arm/cpu/armv7/ipq/cmd_bootipq.c
M board/qcom/ipq806x_cdp/ipq806x_cdp.c
M common/cmd_bootm.c
M include/configs/ipq806x_cdp.h
5 files changed, 163 insertions(+), 23 deletions(-)



diff --git a/arch/arm/cpu/armv7/ipq/Makefile
b/arch/arm/cpu/armv7/ipq/Makefile
index a12eb7d..5e9967e 100644
--- a/arch/arm/cpu/armv7/ipq/Makefile
+++ b/arch/arm/cpu/armv7/ipq/Makefile
@@ -8,6 +8,7 @@
COBJS-y += clock.o
COBJS-y += gpio.o
COBJS-y += smem.o
+COBJS-y += cmd_bootipq.o

SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
diff --git a/arch/arm/cpu/armv7/ipq/cmd_bootipq.c
b/arch/arm/cpu/armv7/ipq/cmd_bootipq.c
new file mode 100644
index 0000000..457d2fe
--- /dev/null
+++ b/arch/arm/cpu/armv7/ipq/cmd_bootipq.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2013 Qualcomm Atheros, Inc.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <image.h>
+#include <asm/arch-ipq806x/smem.h>
+
+#define IPQ_IMG_LOAD_TEMP_ADDR (CONFIG_SYS_SDRAM_BASE + (32 << 20))
+
+#define img_addr ((void *)IPQ_IMG_LOAD_TEMP_ADDR)
+
+static int debug = 0;
+static ipq_smem_flash_info_t *sfi = &ipq_smem_flash_info;
+
+/**
+ * check if the image and its header is valid and move it to
+ * load address as specified in the header
+ */
+static int load_nss_img(const char *runcmd, char *args, int argslen,
+ int nsscore)
+{
+ char cmd[128];
+ int ret;
+
+ if (debug)
+ printf(runcmd);
+
+ if ((ret = run_command(runcmd, 0)) != CMD_RET_SUCCESS) {
+ return ret;
+ }
+
+ sprintf(cmd, "bootm start 0x%x; bootm loados", (uint32_t)img_addr);
+
+ if (debug)
+ printf(cmd);
+
+ if ((ret = run_command(cmd, 0)) != CMD_RET_SUCCESS) {
+ return ret;
+ }
+
+ if (args) {
+ snprintf(args, argslen, "qca-nss-drv.load%d=0x%x,"
+ "qca-nss-drv.entry%d=0x%x,"
+ "qca-nss-drv.string%d=\"%.*s\"",
+ nsscore, image_get_load(img_addr),
+ nsscore, image_get_ep(img_addr),
+ nsscore, IH_NMLEN, image_get_name(img_addr));
+ }
+
+ return ret;
+}
+
+/**
+ * Load the NSS images and Kernel image and transfer control to kernel
+ */
+static int do_bootipq(cmd_tbl_t *cmdtp, int flag, int argc, char *const
argv[])
+{
+ char bootargs[IH_NMLEN+32];
+ char runcmd[128];
+
+ if (argc == 2 && strncmp(argv[1], "debug", 5) == 0)
+ debug = 1;
+
+ /* check the smem info to see whether the partition size is valid.
+ * refer board/qcom/ipq806x_cdp/ipq806x_cdp.c:ipq_get_part_details
+ * for more details
+ */
+ if (sfi->nss[0].size != 0xBAD0FF5E) {
+ sprintf(runcmd, "nand read 0x%x 0x%llx 0x%llx",
+ img_addr, sfi->nss[0].offset, sfi->nss[0].size);
+
+ if (load_nss_img(runcmd, bootargs, sizeof(bootargs), 0)
+ != CMD_RET_SUCCESS)
+ return CMD_RET_FAILURE;
+
+ if (getenv("nssbootargs0") == NULL)
+ setenv("nssbootargs0", bootargs);
+
+ run_command("setenv bootargs ${bootargs} ${nssbootargs0}", 0);
+ }
+
+ if (sfi->nss[1].size != 0xBAD0FF5E) {
+ sprintf(runcmd, "nand read 0x%x 0x%llx 0x%llx",
+ img_addr, sfi->nss[1].offset, sfi->nss[1].size);
+
+ if (load_nss_img(runcmd, bootargs, sizeof(bootargs), 1)
+ != CMD_RET_SUCCESS)
+ return CMD_RET_FAILURE;
+
+ if (getenv("nssbootargs1") == NULL)
+ setenv("nssbootargs1", bootargs);
+
+ run_command("setenv bootargs ${bootargs} ${nssbootargs1}", 0);
+ }
+
+ if (debug) {
+ run_command("printenv bootargs", 0);
+ printf("Booting from flash\n");
+ }
+
+ snprintf(runcmd, sizeof(runcmd), "set autostart yes;"
+ "nboot 0x%x 0 0x%llx", img_addr, sfi->hlos.offset);
+ if (debug)
+ printf(runcmd);
+
+ if (run_command(runcmd, 0) != CMD_RET_SUCCESS)
+ return CMD_RET_FAILURE;
+
+ return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(bootipq, 2, 0, do_bootipq,
+ "bootipq from flash device",
+ "bootipq [debug] - Load image(s) and boots the kernel\n");
diff --git a/board/qcom/ipq806x_cdp/ipq806x_cdp.c
b/board/qcom/ipq806x_cdp/ipq806x_cdp.c
index d9609ec..e920ac9 100644
--- a/board/qcom/ipq806x_cdp/ipq806x_cdp.c
+++ b/board/qcom/ipq806x_cdp/ipq806x_cdp.c
@@ -1,5 +1,5 @@

-/* * Copyright (c) 2012 Qualcomm Atheros, Inc. * */
+/* * Copyright (c) 2012-2013 Qualcomm Atheros, Inc. * */

#include <common.h>
#include <linux/mtd/ipq_nand.h>
@@ -33,8 +33,8 @@
loff_t board_env_size;
ipq_smem_flash_info_t *sfi = &ipq_smem_flash_info;

- gd->bd->bi_boot_params = IPQ_BOOT_PARAMS_ADDR;
- configure_uart_gpio();
+ gd->bd->bi_boot_params = IPQ_BOOT_PARAMS_ADDR;
+ configure_uart_gpio();

/*
* Should be inited, before env_relocate() is called,
@@ -65,13 +65,13 @@
BUG_ON(board_env_size < CONFIG_ENV_SIZE);
}

- return 0;
+ return 0;
}

void enable_caches(void)
{
- icache_enable();
- dcache_enable();
+ icache_enable();
+ dcache_enable();

}

@@ -85,9 +85,9 @@

int dram_init(void)
{
- /*TODO: Memory size will change for booting kernel*/
- gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
- return 0;
+ /*TODO: Memory size will change for booting kernel*/
+ gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+ return 0;
}

/*******************************************************
@@ -100,11 +100,11 @@

void dram_init_banksize(void)
{
- /* TODO: Memory layout will change for booting kernel
- + * This is intial bring up setup
- + */
- gd->bd->bi_dram[0].start = IPQ_KERNEL_START_ADDR;
- gd->bd->bi_dram[0].size = IPQ_DRAM_KERNEL_SIZE;
+ /* TODO: Memory layout will change for booting kernel
+ + * This is intial bring up setup
+ + */
+ gd->bd->bi_dram[0].start = IPQ_KERNEL_START_ADDR;
+ gd->bd->bi_dram[0].size = IPQ_DRAM_KERNEL_SIZE;

}

@@ -112,13 +112,13 @@
{

#ifdef CONFIG_RUMI
- gpio_tlmm_config(51, 1, GPIO_OUTPUT, GPIO_NO_PULL,GPIO_12MA,
GPIO_DISABLE);
- gpio_tlmm_config(52, 1, GPIO_INPUT, GPIO_NO_PULL,GPIO_12MA,
GPIO_DISABLE);
- gpio_tlmm_config(53, 1, GPIO_INPUT, GPIO_NO_PULL,GPIO_12MA,
GPIO_DISABLE);
- gpio_tlmm_config(54, 1, GPIO_OUTPUT, GPIO_NO_PULL,GPIO_12MA,
GPIO_DISABLE);
+ gpio_tlmm_config(51, 1, GPIO_OUTPUT, GPIO_NO_PULL,GPIO_12MA,
GPIO_DISABLE);
+ gpio_tlmm_config(52, 1, GPIO_INPUT, GPIO_NO_PULL,GPIO_12MA, GPIO_DISABLE);
+ gpio_tlmm_config(53, 1, GPIO_INPUT, GPIO_NO_PULL,GPIO_12MA, GPIO_DISABLE);
+ gpio_tlmm_config(54, 1, GPIO_OUTPUT, GPIO_NO_PULL,GPIO_12MA,
GPIO_DISABLE);
#else
- gpio_tlmm_config(83, 1, GPIO_INPUT, GPIO_NO_PULL,GPIO_8MA,
GPIO_DISABLE);
- gpio_tlmm_config(82, 2, GPIO_OUTPUT, GPIO_NO_PULL,GPIO_8MA,
GPIO_DISABLE);
+ gpio_tlmm_config(83, 1, GPIO_INPUT, GPIO_NO_PULL,GPIO_8MA, GPIO_DISABLE);
+ gpio_tlmm_config(82, 2, GPIO_OUTPUT, GPIO_NO_PULL,GPIO_8MA, GPIO_DISABLE);
#endif

}
@@ -133,14 +133,17 @@
#ifdef CONFIG_DISPLAY_BOARDINFO
int checkboard(void)
{
- printf("Board: %s\n", sysinfo.board_string);
- return 0;
+ printf("Board: %s\n", sysinfo.board_string);
+ return 0;
}
#endif /* CONFIG_DISPLAY_BOARDINFO */

void reset_cpu(ulong addr)
{
- for(;;);
+ /*
+ * TODO: Need to implement reset_cpu().
+ */
+ for(;;);
}

static void configure_nand_gpio(void)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 4f9d40c..4b13c69 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -857,11 +857,13 @@
}
bootstage_mark(BOOTSTAGE_ID_CHECK_ARCH);

+#ifndef CONFIG_IPQ_FIRMWARE
if (!image_check_target_arch(hdr)) {
printf("Unsupported Architecture 0x%x\n", image_get_arch(hdr));
bootstage_error(BOOTSTAGE_ID_CHECK_ARCH);
return NULL;
}
+#endif
return hdr;
}

@@ -920,8 +922,10 @@
buf = map_sysmem(img_addr, 0);
switch (genimg_get_format(buf)) {
case IMAGE_FORMAT_LEGACY:
+#ifndef CONFIG_IPQ_FIRMWARE
printf("## Booting kernel from Legacy Image at %08lx ...\n",
img_addr);
+#endif
hdr = image_get_kernel(img_addr, images->verify);
if (!hdr)
return NULL;
@@ -931,6 +935,9 @@
switch (image_get_type(hdr)) {
case IH_TYPE_KERNEL:
case IH_TYPE_KERNEL_NOLOAD:
+#ifdef CONFIG_IPQ_FIRMWARE
+ case IH_TYPE_FIRMWARE:
+#endif
*os_data = image_get_data(hdr);
*os_len = image_get_data_size(hdr);
break;
diff --git a/include/configs/ipq806x_cdp.h b/include/configs/ipq806x_cdp.h
index 4ca9b2e..276567c 100644
--- a/include/configs/ipq806x_cdp.h
+++ b/include/configs/ipq806x_cdp.h
@@ -123,6 +123,10 @@
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_SYS_HZ 1000

+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_CS 0
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+
/*
* NAND Flash Configs
*/
@@ -168,4 +172,13 @@

#endif

+/* NSS firmware loaded using bootm */
+#define CONFIG_IPQ_FIRMWARE
+#define CONFIG_BOOTCOMMAND "bootipq"
+#define CONFIG_BOOTARGS \
+ "root=mtd:0:EFS2APPS rootfstype=jffs2 ro init=/init
console=ttyHSL1,115200n8"
+
+#define CONFIG_CMD_ECHO
+#define CONFIG_BOOTDELAY 2
+
#endif /* _IPQCDP_H */

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Gerrit-MessageType: newchange
Gerrit-Change-Id: Ia4eef84ebe8ee7e948b96587bdb81d17cd16ad6f
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/u-boot
Gerrit-Branch: chromeos-v2013.06
Gerrit-Owner: Vadim Bendebury <vbe...@chromium.org>

[Vadim Bendebury (Gerrit)]

Vadim Bendebury has abandoned this change.

Change subject: [ipq806x] Boot command for U-Boot
......................................................................

Abandoned

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To unsubscribe, visit https://chromium-review.googlesource.com/settings

Gerrit-MessageType: abandon