Josh Triplett has uploaded a new change for review.
https://gerrit.chromium.org/gerrit/56431
Change subject: BACKPORT: drm/i915: kill intel_dp_link_clock()
......................................................................
BACKPORT: drm/i915: kill intel_dp_link_clock()
Use drm_dp_bw_code_to_link_rate insead. It's the same thing, but
supports DP_LINK_BW_5_4 and is also used by the other drivers.
Signed-off-by: Paulo Zanoni <
paulo.r...@intel.com>
Signed-off-by: Daniel Vetter <
daniel...@ffwll.ch>
(cherry picked from commit 9fa5f6522e6eecb5ab20192a264a29ba4f2f4e85)
BUG=chrome-os-partner:19682
TEST=With entire patch series applied, observe PC7 residency via powertop in
crosh.
Change-Id: I0dc8c1a3a8c42568fb7579d9c83205a05ae50a1a
---
M drivers/gpu/drm/i915/intel_dp.c
1 file changed, 7 insertions(+), 12 deletions(-)
git pull ssh://
gerrit.chromium.org:29418/chromiumos/third_party/kernel-next refs/changes/31/56431/1
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index e631d37..1799abb 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -148,15 +148,6 @@
return max_link_bw;
}
-static int
-intel_dp_link_clock(uint8_t link_bw)
-{
- if (link_bw == DP_LINK_BW_2_7)
- return 270000;
- else
- return 162000;
-}
-
/*
* The units on the numbers in the next two are... bizarre. Examples will
* make it clearer; this one parallels an example in the eDP spec.
@@ -191,7 +182,8 @@
struct drm_display_mode *mode,
bool adjust_mode)
{
- int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp));
+ int max_link_clock =
+ drm_dp_bw_code_to_link_rate(intel_dp_max_link_bw(intel_dp));
int max_lanes = drm_dp_max_lane_count(intel_dp->dpcd);
int max_rate, mode_rate;
@@ -737,12 +729,15 @@
for (clock = 0; clock <= max_clock; clock++) {
for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
- int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
+ int link_bw_clock =
+ drm_dp_bw_code_to_link_rate(bws[clock]);
+ int link_avail = intel_dp_max_data_rate(link_bw_clock,
+ lane_count);
if (mode_rate <= link_avail) {
intel_dp->link_bw = bws[clock];
intel_dp->lane_count = lane_count;
- adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw);
+ adjusted_mode->clock = link_bw_clock;
DRM_DEBUG_KMS("DP link bw %02x lane "
"count %d clock %d bpp %d\n",
intel_dp->link_bw, intel_dp->lane_count,
--
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https://gerrit.chromium.org/gerrit/56431
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I0dc8c1a3a8c42568fb7579d9c83205a05ae50a1a
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Josh Triplett <
jo...@joshtriplett.org>