Vivek Gautam has uploaded a new change for review.
https://gerrit.chromium.org/gerrit/56399
Change subject: clk: samsung: exynos5420: Add support for USB IPs' clocks
......................................................................
clk: samsung: exynos5420: Add support for USB IPs' clocks
Adding required GATE definitions for USB 2.0 clock,
as well as clocks for both USB 3.0 channels.
These clocks are derived from ACLK_200_FSYS clock.
BUG=chrome-os-partner:19007
TEST=build and boot on smdk5420 and peach pit;
tested usb HID devices and mass storage devices on
USB 2.0 and USB 3.0 ports.
Change-Id: I338d0c910d8f357b953c0992bdfaa7448fcb515b
Signed-off-by: Vivek Gautam <
gautam...@samsung.com>
---
M drivers/clk/samsung/clk-exynos5420.c
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://
gerrit.chromium.org:29418/chromiumos/third_party/kernel-next refs/changes/99/56399/1
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 2b49f8f..49143d9 100755
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -572,6 +572,9 @@
GATE(smmu_jpeg, "smmu_jpeg", "aclk300_jpeg", GATE_IP_GEN, 7, 0, 0),
GATE(smmu_mdma1, "smmu_mdma1", "aclk266", GATE_IP_GEN, 9, 0, 0),
GATE(g3d, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0),
+ GATE(usbh20, "usbh20", "aclk200_fsys", GATE_IP_FSYS, 18, 0, 0),
+ GATE(usbd300, "usbd300", "aclk200_fsys", GATE_IP_FSYS, 19, 0, 0),
+ GATE(usbd301, "usbd301", "aclk200_fsys", GATE_IP_FSYS, 20, 0, 0),
};
static __initdata struct of_device_id ext_clk_match[] = {
--
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I338d0c910d8f357b953c0992bdfaa7448fcb515b
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Vivek Gautam <
gautam...@samsung.com>