ARM: dts: exynos5420: add i2c and hsi2c device nodes [chromiumos/third_party/kernel-next : chromeos-3.8]

2 views
Skip to first unread message

Andrew Bresticker (Code Review)

unread,
May 24, 2013, 12:22:11 AM5/24/13
to Simon Glass, Doug Anderson, Olof Johansson
Hello Simon Glass, Doug Anderson,

I'd like you to do a code review. Please visit

https://gerrit.chromium.org/gerrit/56564

to review the following change.

Change subject: ARM: dts: exynos5420: add i2c and hsi2c device nodes
......................................................................

ARM: dts: exynos5420: add i2c and hsi2c device nodes

This adds device-tree nodes for the i2c and high-speed i2c busses
on Exynos 5420 platforms.

BUG=chrome-os-partner:19007
TEST=Build and boot on peach-pit; i2c devices work once peach-pit
DT changes are added.

Change-Id: Id0c90d96f7ada12ee903ab746e7f56284c34a899
Signed-off-by: Andrew Bresticker <abre...@chromium.org>
---
M arch/arm/boot/dts/exynos5420.dtsi
1 file changed, 154 insertions(+), 0 deletions(-)


git pull ssh://gerrit.chromium.org:29418/chromiumos/third_party/kernel-next refs/changes/64/56564/1

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 08b3206..eb26908 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -25,6 +25,17 @@
mshc0 = &dwmmc_0;
mshc1 = &dwmmc_1;
mshc2 = &dwmmc_2;
+ i2c0 = &i2c_0;
+ i2c1 = &i2c_1;
+ i2c2 = &i2c_2;
+ i2c3 = &i2c_3;
+ i2c4 = &hsi2c_4;
+ i2c5 = &hsi2c_5;
+ i2c6 = &hsi2c_6;
+ i2c7 = &hsi2c_7;
+ i2c8 = &hsi2c_8;
+ i2c9 = &hsi2c_9;
+ i2c10 = &hsi2c_10;
};

clock: clock-controller@0x10010000 {
@@ -272,4 +283,147 @@
clock-names = "biu", "ciu";
status = "disabled";
};
+
+ i2c_0: i2c@12C60000 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C60000 0x100>;
+ interrupts = <0 56 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_bus>;
+ clocks = <&clock 261>;
+ clock-names = "i2c";
+ status = "disabled";
+ };
+
+ i2c_1: i2c@12C70000 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C70000 0x100>;
+ interrupts = <0 57 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_bus>;
+ clocks = <&clock 262>;
+ clock-names = "i2c";
+ status = "disabled";
+ };
+
+ i2c_2: i2c@12C80000 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C80000 0x100>;
+ interrupts = <0 58 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_bus>;
+ clocks = <&clock 263>;
+ clock-names = "i2c";
+ status = "disabled";
+ };
+
+ i2c_3: i2c@12C90000 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C90000 0x100>;
+ interrupts = <0 59 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_bus>;
+ clocks = <&clock 264>;
+ clock-names = "i2c";
+ status = "disabled";
+ };
+
+ hsi2c_4: hsi2c@12CA0000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CA0000 0x1000>;
+ interrupts = <0 60 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_hs_bus>;
+ clocks = <&clock 265>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_5: hsi2c@12CB0000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CB0000 0x1000>;
+ interrupts = <0 61 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5_hs_bus>;
+ clocks = <&clock 266>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_6: hsi2c@12CC0000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CC0000 0x1000>;
+ interrupts = <0 62 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c6_hs_bus>;
+ clocks = <&clock 267>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_7: hsi2c@12CD0000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CD0000 0x1000>;
+ interrupts = <0 63 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c7_hs_bus>;
+ clocks = <&clock 268>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_8: hsi2c@12E00000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12E00000 0x1000>;
+ interrupts = <0 87 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c8_hs_bus>;
+ clocks = <&clock 281>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_9: hsi2c@12E10000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12E10000 0x1000>;
+ interrupts = <0 88 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c9_hs_bus>;
+ clocks = <&clock 282>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_10: hsi2c@12E20000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12E20000 0x1000>;
+ interrupts = <0 203 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c10_hs_bus>;
+ clocks = <&clock 283>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
};

--
To view, visit https://gerrit.chromium.org/gerrit/56564
To unsubscribe, visit https://gerrit.chromium.org/gerrit/settings

Gerrit-MessageType: newchange
Gerrit-Change-Id: Id0c90d96f7ada12ee903ab746e7f56284c34a899
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Andrew Bresticker <abre...@chromium.org>
Gerrit-Reviewer: Doug Anderson <dian...@chromium.org>
Gerrit-Reviewer: Simon Glass <s...@chromium.org>

Simon Glass (Code Review)

unread,
May 24, 2013, 2:18:02 AM5/24/13
to Andrew Bresticker, ChromeBot, Doug Anderson
Simon Glass has posted comments on this change.

Change subject: ARM: dts: exynos5420: add i2c and hsi2c device nodes
......................................................................


Patch Set 2: Looks good to me, approved
Gerrit-MessageType: comment
Gerrit-Change-Id: Id0c90d96f7ada12ee903ab746e7f56284c34a899
Gerrit-PatchSet: 2
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Andrew Bresticker <abre...@chromium.org>
Gerrit-Reviewer: ChromeBot <chrom...@google.com>

Andrew Bresticker (Code Review)

unread,
May 24, 2013, 2:29:24 AM5/24/13
to ChromeBot, Doug Anderson, Simon Glass
Andrew Bresticker has posted comments on this change.

Change subject: ARM: dts: exynos5420: add i2c and hsi2c device nodes
......................................................................


Patch Set 2: Ready; Verified
Gerrit-MessageType: comment
Gerrit-Change-Id: Id0c90d96f7ada12ee903ab746e7f56284c34a899
Gerrit-PatchSet: 2
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Andrew Bresticker <abre...@chromium.org>
Gerrit-Reviewer: Andrew Bresticker <abre...@chromium.org>
Gerrit-Reviewer: ChromeBot <chrom...@google.com>

Andrew Bresticker (Code Review)

unread,
May 24, 2013, 12:13:43 PM5/24/13
to ChromeBot, Doug Anderson, Simon Glass
Andrew Bresticker has posted comments on this change.

Change subject: ARM: dts: exynos5420: add i2c and hsi2c device nodes
......................................................................


Patch Set 2: Ready
Gerrit-MessageType: comment
Gerrit-Change-Id: Id0c90d96f7ada12ee903ab746e7f56284c34a899
Gerrit-PatchSet: 2
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Andrew Bresticker <abre...@chromium.org>
Gerrit-Reviewer: Andrew Bresticker <abre...@chromium.org>
Gerrit-Reviewer: ChromeBot <chrom...@google.com>

Andrew Bresticker (Code Review)

unread,
May 24, 2013, 1:48:59 PM5/24/13
to ChromeBot, Doug Anderson, Simon Glass
Andrew Bresticker has posted comments on this change.

Change subject: ARM: dts: exynos5420: add i2c and hsi2c device nodes
......................................................................


Patch Set 2: Ready
Gerrit-MessageType: comment
Gerrit-Change-Id: Id0c90d96f7ada12ee903ab746e7f56284c34a899
Gerrit-PatchSet: 2
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Andrew Bresticker <abre...@chromium.org>
Gerrit-Reviewer: Andrew Bresticker <abre...@chromium.org>
Gerrit-Reviewer: ChromeBot <chrom...@google.com>
Reply all
Reply to author
Forward
0 new messages