UPSTREAM: drm/tegra: sor: Do not setup DPAUX at probe time [chromiumos/third_party/kernel : chromeos-3.18]

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Kary Jin (Gerrit)

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Mar 7, 2016, 3:23:43 AM3/7/16
to Olof Johansson
Kary Jin has uploaded a new change for review.

https://chromium-review.googlesource.com/331022

Change subject: UPSTREAM: drm/tegra: sor: Do not setup DPAUX at probe time
......................................................................

UPSTREAM: drm/tegra: sor: Do not setup DPAUX at probe time

Setting up the DPAUX at probe time doesn't work because DPAUX is in the
same power domain as the SOR, and nothing may have turned on that domain
if the SOR driver didn't probe yet. The result is that register accesses
hang. Since the SOR device depends on the DPAUX device it's pretty much
guaranteed that nothing in the Linux kernel will have enabled the power
domain. The reason why this hasn't caused any problems is that the power
partition is enable by default on hardware reset.

However, firmware exists that will aggressively disable power partitions
before passing control to the kernel, at which point this becomes a real
problem. The solution implemented in this patch is to defer programming
of the mux option until the DPAUX pads are used. There is already an API
to do this, so just pass it a parameter that determines in which mode to
setup the pads. This will automatically make sure that no registers are
accessed before the SOR needs the DPAUX and has already enable the power
partition.

Fixes: 3227166c3bd6 ("drm/tegra: dpaux: Configure pads as I2C by
default")
Signed-off-by: Thierry Reding <tre...@nvidia.com>
[from https://github.com/thierryreding/linux.git]
(cherry picked from commit 31377b1a08b5dd35841fabf6e6ef36034e7fefc6)

Change-Id: I722527260d711de41ad656f707eb71a1dc05dd99
Signed-off-by: Kary Jin <ka...@nvidia.com>
---
M drivers/gpu/drm/tegra/dpaux.c
M drivers/gpu/drm/tegra/drm.h
M drivers/gpu/drm/tegra/sor.c
3 files changed, 25 insertions(+), 30 deletions(-)



diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c
index 6deadf7..e648cf0 100644
--- a/drivers/gpu/drm/tegra/dpaux.c
+++ b/drivers/gpu/drm/tegra/dpaux.c
@@ -361,24 +361,6 @@
if (err < 0)
return err;

- /*
- * Assume that by default the DPAUX/I2C pads will be used for HDMI,
- * so power them up and configure them in I2C mode.
- *
- * The DPAUX code paths reconfigure the pads in AUX mode, but there
- * is no possibility to perform the I2C mode configuration in the
- * HDMI path.
- */
- value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);
- value &= ~DPAUX_HYBRID_SPARE_PAD_POWER_DOWN;
- tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_SPARE);
-
- value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_PADCTL);
- value = DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV |
- DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV |
- DPAUX_HYBRID_PADCTL_MODE_I2C;
- tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_PADCTL);
-
/* enable and clear all interrupts */
value = DPAUX_INTR_AUX_DONE | DPAUX_INTR_IRQ_EVENT |
DPAUX_INTR_UNPLUG_EVENT | DPAUX_INTR_PLUG_EVENT;
@@ -513,17 +495,25 @@
return 0;
}

-int drm_dp_aux_enable(struct drm_dp_aux *aux)
+int drm_dp_aux_enable(struct drm_dp_aux *aux, enum drm_dp_aux_mode mode)
{
struct tegra_dpaux *dpaux = to_dpaux(aux);
u32 value;

- value = DPAUX_HYBRID_PADCTL_AUX_CMH(2) |
- DPAUX_HYBRID_PADCTL_AUX_DRVZ(4) |
- DPAUX_HYBRID_PADCTL_AUX_DRVI(0x18) |
- DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV |
- DPAUX_HYBRID_PADCTL_MODE_AUX;
- tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_PADCTL);
+ if (mode == DRM_DP_AUX_MODE_I2C) {
+ value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_PADCTL);
+ value = DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV |
+ DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV |
+ DPAUX_HYBRID_PADCTL_MODE_I2C;
+ tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_PADCTL);
+ } else {
+ value = DPAUX_HYBRID_PADCTL_AUX_CMH(2) |
+ DPAUX_HYBRID_PADCTL_AUX_DRVZ(4) |
+ DPAUX_HYBRID_PADCTL_AUX_DRVI(0x18) |
+ DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV |
+ DPAUX_HYBRID_PADCTL_MODE_AUX;
+ tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_PADCTL);
+ }

value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);
value &= ~DPAUX_HYBRID_SPARE_PAD_POWER_DOWN;
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
index aa99831..3c7214d 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/drm/tegra/drm.h
@@ -303,11 +303,16 @@
void tegra_output_encoder_destroy(struct drm_encoder *encoder);

/* from dpaux.c */
+enum drm_dp_aux_mode {
+ DRM_DP_AUX_MODE_I2C,
+ DRM_DP_AUX_MODE_AUX,
+};
+
struct drm_dp_aux *drm_dp_aux_find_by_of_node(struct device_node *np);
enum drm_connector_status drm_dp_aux_detect(struct drm_dp_aux *aux);
int drm_dp_aux_attach(struct drm_dp_aux *aux, struct tegra_output *output);
int drm_dp_aux_detach(struct drm_dp_aux *aux);
-int drm_dp_aux_enable(struct drm_dp_aux *aux);
+int drm_dp_aux_enable(struct drm_dp_aux *aux, enum drm_dp_aux_mode mode);
int drm_dp_aux_disable(struct drm_dp_aux *aux);

/* from fb.c */
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index 833ab2f..d1c3ce6 100644
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -1291,7 +1291,7 @@
int err;

if (sor->aux)
- drm_dp_aux_enable(sor->aux);
+ drm_dp_aux_enable(sor->aux, DRM_DP_AUX_MODE_AUX);

err = tegra_output_connector_get_modes(connector);

@@ -1664,7 +1664,7 @@

usleep_range(20, 100);

- drm_dp_aux_enable(sor->aux);
+ drm_dp_aux_enable(sor->aux, DRM_DP_AUX_MODE_AUX);

err = drm_dp_link_probe(sor->aux, &sor->link);
if (err < 0) {
@@ -2328,7 +2328,7 @@
u32 value;
int err;

- drm_dp_aux_enable(sor->aux);
+ drm_dp_aux_enable(sor->aux, DRM_DP_AUX_MODE_AUX);

err = drm_dp_link_power_down(sor->aux, &sor->link);
if (err < 0)
@@ -2410,7 +2410,7 @@

usleep_range(20, 100);

- drm_dp_aux_enable(sor->aux);
+ drm_dp_aux_enable(sor->aux, DRM_DP_AUX_MODE_AUX);

err = drm_dp_link_probe(sor->aux, &sor->link);
if (err < 0) {

--
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I722527260d711de41ad656f707eb71a1dc05dd99
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/kernel
Gerrit-Branch: chromeos-3.18
Gerrit-Owner: Kary Jin <ka...@nvidia.com>

Kary Jin (Gerrit)

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Mar 7, 2016, 5:15:28 AM3/7/16
to chromium-...@chromium.org
Kary Jin has uploaded a new patch set (#3).
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I722527260d711de41ad656f707eb71a1dc05dd99
Gerrit-PatchSet: 3

Sean Paul (Gerrit)

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Mar 23, 2016, 11:18:23 AM3/23/16
to Sean Paul, Kary Jin
Sean Paul has posted comments on this change.

Change subject: UPSTREAM: drm/tegra: sor: Do not setup DPAUX at probe time
......................................................................


Patch Set 4: Verified+1

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Gerrit-Change-Id: I722527260d711de41ad656f707eb71a1dc05dd99
Gerrit-PatchSet: 4
Gerrit-Project: chromiumos/third_party/kernel
Gerrit-Branch: chromeos-3.18
Gerrit-Owner: Kary Jin <ka...@nvidia.com>
Gerrit-Reviewer: Sean Paul <sean...@chromium.org>
Gerrit-HasComments: No

Sean Paul (Gerrit)

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Mar 23, 2016, 11:22:39 AM3/23/16
to Sean Paul, Kary Jin
Sean Paul has posted comments on this change.

Change subject: UPSTREAM: drm/tegra: sor: Do not setup DPAUX at probe time
......................................................................


Patch Set 4: Code-Review+2

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Gerrit-Change-Id: I722527260d711de41ad656f707eb71a1dc05dd99
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Gerrit-Branch: chromeos-3.18
Gerrit-Owner: Kary Jin <ka...@nvidia.com>

Sean Paul (Gerrit)

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Mar 23, 2016, 12:36:04 PM3/23/16
to Sean Paul, Kary Jin
Sean Paul has posted comments on this change.

Change subject: UPSTREAM: drm/tegra: sor: Do not setup DPAUX at probe time
......................................................................


Patch Set 4: Commit-Queue+1

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Gerrit-MessageType: comment
Gerrit-Change-Id: I722527260d711de41ad656f707eb71a1dc05dd99
Gerrit-PatchSet: 4
Gerrit-Project: chromiumos/third_party/kernel
Gerrit-Branch: chromeos-3.18
Gerrit-Owner: Kary Jin <ka...@nvidia.com>

ChromeOS Commit Bot (Gerrit)

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Mar 24, 2016, 3:03:52 AM3/24/16
to Kary Jin, Sean Paul, ChromeOS bot
Hello Sean Paul, Kary Jin,

I'd like you to reexamine a change. Please visit

https://chromium-review.googlesource.com/331022

to look at the new patch set (#5).
Reviewed-on: https://chromium-review.googlesource.com/331022
Commit-Ready: Sean Paul <sean...@chromium.org>
Tested-by: Sean Paul <sean...@chromium.org>
Reviewed-by: Sean Paul <sean...@chromium.org>
---
M drivers/gpu/drm/tegra/dpaux.c
M drivers/gpu/drm/tegra/drm.h
M drivers/gpu/drm/tegra/sor.c
3 files changed, 25 insertions(+), 30 deletions(-)


--
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I722527260d711de41ad656f707eb71a1dc05dd99
Gerrit-PatchSet: 5
Gerrit-Project: chromiumos/third_party/kernel
Gerrit-Branch: chromeos-3.18
Gerrit-Owner: Kary Jin <ka...@nvidia.com>
Gerrit-Reviewer: ChromeOS Commit Bot <chromeos-...@chromium.org>
Gerrit-Reviewer: ChromeOS bot
<3su6n15k...@developer.gserviceaccount.com>
Gerrit-Reviewer: Sean Paul <sean...@chromium.org>

ChromeOS Commit Bot (Gerrit)

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Mar 24, 2016, 3:03:54 AM3/24/16
to Kary Jin, Sean Paul, ChromeOS bot
ChromeOS Commit Bot has submitted this change and it was merged.
Reviewed-on: https://chromium-review.googlesource.com/331022
Commit-Ready: Sean Paul <sean...@chromium.org>
Tested-by: Sean Paul <sean...@chromium.org>
Reviewed-by: Sean Paul <sean...@chromium.org>
Gerrit-MessageType: merged
Gerrit-Change-Id: I722527260d711de41ad656f707eb71a1dc05dd99
Gerrit-PatchSet: 5
Gerrit-Project: chromiumos/third_party/kernel
Gerrit-Branch: chromeos-3.18
Gerrit-Owner: Kary Jin <ka...@nvidia.com>
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