CHROMIUM: coreboot: Program i2c-designware SDA Hold Register [chromiumos/third_party/coreboot : firmware-quawks-5216.204.B]

13 views
Skip to first unread message

Kevin Cheng (Gerrit)

unread,
May 27, 2014, 2:15:31 PM5/27/14
to Wenkai Du
Kevin Cheng has uploaded a new change for review.

https://chromium-review.googlesource.com/201664

Change subject: CHROMIUM: coreboot: Program i2c-designware SDA Hold Register
......................................................................

CHROMIUM: coreboot: Program i2c-designware SDA Hold Register

I2C bus SDA hold time can be marginal with 60ns value, especially
when there is level shifter on the bus. So program it to 300ns
based on Fast-mode specification, which is between 0 to 900ns.
Apply the same timing for Standard-mode as well.

BUG=chrome-os-partner:28886
TEST=Manual: Check i2c-designware drivers work on Rambi.

Change-Id: I799ec066eba5ebb8134a5fe7a479c25a603cef1b
Reported-by: duso...@emc.com.tw
Signed-off-by: Wenkai Du <wenk...@intel.com>
---
M src/soc/intel/baytrail/acpi/lpss.asl
1 file changed, 14 insertions(+), 14 deletions(-)



diff --git a/src/soc/intel/baytrail/acpi/lpss.asl
b/src/soc/intel/baytrail/acpi/lpss.asl
index 0f8f746..274f925 100644
--- a/src/soc/intel/baytrail/acpi/lpss.asl
+++ b/src/soc/intel/baytrail/acpi/lpss.asl
@@ -90,10 +90,10 @@
Name (_DDN, "I2C Controller #1")

/* Standard Mode: HCNT, LCNT, SDA Hold Time */
- Name (SSCN, Package () { 0x200, 0x200, 0x6 })
+ Name (SSCN, Package () { 0x200, 0x200, 0x1E })

/* Fast Mode: HCNT, LCNT, SDA Hold Time */
- Name (FMCN, Package () { 0x55, 0x99, 0x6 })
+ Name (FMCN, Package () { 0x55, 0x99, 0x1E })

Name (RBUF, ResourceTemplate()
{
@@ -149,10 +149,10 @@
Name (_DDN, "I2C Controller #2")

/* Standard Mode: HCNT, LCNT, SDA Hold Time */
- Name (SSCN, Package () { 0x200, 0x200, 0x6 })
+ Name (SSCN, Package () { 0x200, 0x200, 0x1E })

/* Fast Mode: HCNT, LCNT, SDA Hold Time */
- Name (FMCN, Package () { 0x55, 0x99, 0x6 })
+ Name (FMCN, Package () { 0x55, 0x99, 0x1E })

Name (RBUF, ResourceTemplate()
{
@@ -208,10 +208,10 @@
Name (_DDN, "I2C Controller #3")

/* Standard Mode: HCNT, LCNT, SDA Hold Time */
- Name (SSCN, Package () { 0x200, 0x200, 0x6 })
+ Name (SSCN, Package () { 0x200, 0x200, 0x1E })

/* Fast Mode: HCNT, LCNT, SDA Hold Time */
- Name (FMCN, Package () { 0x55, 0x99, 0x6 })
+ Name (FMCN, Package () { 0x55, 0x99, 0x1E })

Name (RBUF, ResourceTemplate()
{
@@ -267,10 +267,10 @@
Name (_DDN, "I2C Controller #4")

/* Standard Mode: HCNT, LCNT, SDA Hold Time */
- Name (SSCN, Package () { 0x200, 0x200, 0x6 })
+ Name (SSCN, Package () { 0x200, 0x200, 0x1E })

/* Fast Mode: HCNT, LCNT, SDA Hold Time */
- Name (FMCN, Package () { 0x55, 0x99, 0x6 })
+ Name (FMCN, Package () { 0x55, 0x99, 0x1E })

Name (RBUF, ResourceTemplate()
{
@@ -326,10 +326,10 @@
Name (_DDN, "I2C Controller #5")

/* Standard Mode: HCNT, LCNT, SDA Hold Time */
- Name (SSCN, Package () { 0x200, 0x200, 0x6 })
+ Name (SSCN, Package () { 0x200, 0x200, 0x1E })

/* Fast Mode: HCNT, LCNT, SDA Hold Time */
- Name (FMCN, Package () { 0x55, 0x99, 0x6 })
+ Name (FMCN, Package () { 0x55, 0x99, 0x1E })

Name (RBUF, ResourceTemplate()
{
@@ -385,10 +385,10 @@
Name (_DDN, "I2C Controller #6")

/* Standard Mode: HCNT, LCNT, SDA Hold Time */
- Name (SSCN, Package () { 0x200, 0x200, 0x6 })
+ Name (SSCN, Package () { 0x200, 0x200, 0x1E })

/* Fast Mode: HCNT, LCNT, SDA Hold Time */
- Name (FMCN, Package () { 0x55, 0x99, 0x6 })
+ Name (FMCN, Package () { 0x55, 0x99, 0x1E })

Name (RBUF, ResourceTemplate()
{
@@ -444,10 +444,10 @@
Name (_DDN, "I2C Controller #7")

/* Standard Mode: HCNT, LCNT, SDA Hold Time */
- Name (SSCN, Package () { 0x200, 0x200, 0x6 })
+ Name (SSCN, Package () { 0x200, 0x200, 0x1E })

/* Fast Mode: HCNT, LCNT, SDA Hold Time */
- Name (FMCN, Package () { 0x55, 0x99, 0x6 })
+ Name (FMCN, Package () { 0x55, 0x99, 0x1E })

Name (RBUF, ResourceTemplate()
{

--
To view, visit https://chromium-review.googlesource.com/201664
To unsubscribe, visit https://chromium-review.googlesource.com/settings

Gerrit-MessageType: newchange
Gerrit-Change-Id: I799ec066eba5ebb8134a5fe7a479c25a603cef1b
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/coreboot
Gerrit-Branch: firmware-quawks-5216.204.B
Gerrit-Owner: Kevin Cheng <kevin...@intel.com>
Gerrit-Reviewer: Wenkai Du <wenk...@intel.com>

Bernie Thompson (Gerrit)

unread,
May 28, 2014, 2:55:23 PM5/28/14
to Kevin Cheng, Wenkai Du, Shawn Nematbakhsh
Bernie Thompson has posted comments on this change.

Change subject: CHROMIUM: coreboot: Program i2c-designware SDA Hold Register
......................................................................


Patch Set 1: Code-Review+2

Looks to be a clean cherry-pick.
Gerrit-MessageType: comment
Gerrit-Change-Id: I799ec066eba5ebb8134a5fe7a479c25a603cef1b
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/coreboot
Gerrit-Branch: firmware-quawks-5216.204.B
Gerrit-Owner: Kevin Cheng <kevin...@intel.com>
Gerrit-Reviewer: Bernie Thompson <bhtho...@chromium.org>
Gerrit-Reviewer: Shawn Nematbakhsh <sha...@chromium.org>
Gerrit-Reviewer: Wenkai Du <wenk...@intel.com>
Gerrit-HasComments: No

Kevin Cheng (Gerrit)

unread,
May 28, 2014, 2:59:14 PM5/28/14
to Wenkai Du, Bernie Thompson, Shawn Nematbakhsh
Kevin Cheng has posted comments on this change.

Change subject: CHROMIUM: coreboot: Program i2c-designware SDA Hold Register
......................................................................


Patch Set 1: Commit-Queue+1 Verified+1
Gerrit-MessageType: comment
Gerrit-Change-Id: I799ec066eba5ebb8134a5fe7a479c25a603cef1b
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/coreboot
Gerrit-Branch: firmware-quawks-5216.204.B
Gerrit-Owner: Kevin Cheng <kevin...@intel.com>
Gerrit-Reviewer: Bernie Thompson <bhtho...@chromium.org>
Gerrit-Reviewer: Kevin Cheng <kevin...@intel.com>

chrome-internal-fetch (Gerrit)

unread,
May 28, 2014, 3:01:35 PM5/28/14
to Kevin Cheng, Wenkai Du, Bernie Thompson
chrome-internal-fetch has submitted this change and it was merged.

Change subject: CHROMIUM: coreboot: Program i2c-designware SDA Hold Register
......................................................................


CHROMIUM: coreboot: Program i2c-designware SDA Hold Register

I2C bus SDA hold time can be marginal with 60ns value, especially
when there is level shifter on the bus. So program it to 300ns
based on Fast-mode specification, which is between 0 to 900ns.
Apply the same timing for Standard-mode as well.

BUG=chrome-os-partner:28886
TEST=Manual: Check i2c-designware drivers work on Rambi.

Change-Id: I799ec066eba5ebb8134a5fe7a479c25a603cef1b
Reported-by: duso...@emc.com.tw
Signed-off-by: Wenkai Du <wenk...@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/201664
Reviewed-by: Bernie Thompson <bhtho...@chromium.org>
Commit-Queue: Kevin Cheng <kevin...@intel.com>
Tested-by: Kevin Cheng <kevin...@intel.com>
---
M src/soc/intel/baytrail/acpi/lpss.asl
1 file changed, 14 insertions(+), 14 deletions(-)

Approvals:
Kevin Cheng: Ready; Verified
Bernie Thompson: Looks good to me, approved
Gerrit-MessageType: merged
Gerrit-Change-Id: I799ec066eba5ebb8134a5fe7a479c25a603cef1b
Gerrit-PatchSet: 2
Gerrit-Project: chromiumos/third_party/coreboot
Gerrit-Branch: firmware-quawks-5216.204.B
Gerrit-Owner: Kevin Cheng <kevin...@intel.com>
Gerrit-Reviewer: Bernie Thompson <bhtho...@chromium.org>
Gerrit-Reviewer: Kevin Cheng <kevin...@intel.com>
Gerrit-Reviewer: chrome-internal-fetch <chrome-int...@google.com>
Reply all
Reply to author
Forward
0 new messages