88: 0c 94 89 01 jmp 0x312 ; 0x312 <_exit> 0000008c <__bad_interrupt>: 8c: 0c 94 00 00 jmp 0 ; 0x0 <__vectors> 00000090 <_Z20update_ship_movementv>: unsigned char j; for (unsigned char i = 0; i < NUMBER_ITEM_SUPPORTED; i++) // updates each active symbols/Ships for this tickmark of time { j = ship_location[i]; 90: 40 91 05 01 lds r20, 0x0105 shp_type = (int) ship_type[i]; shp_state = (int) ship_state[i]; 94: 80 91 02 01 lds r24, 0x0102 98: 28 2f mov r18, r24 9a: 30 e0 ldi r19, 0x00 ; 0 switch (shp_type) { case 1: // Destroyer if ((shp_state == 1) or (shp_state == 3)) 9c: 8d 7f andi r24, 0xFD ; 253 9e: 81 30 cpi r24, 0x01 ; 1 a0: 39 f0 breq .+14 ; 0xb0 <_Z20update_ship_movementv+0x20> { simulate_poke(j, 1, 181, 1); simulate_poke(j+1, 1, 180, 1); ++shp_state; //advance logic state for a given symbol or ship } else if ((shp_state == 2) or (shp_state == 4)) a2: 22 30 cpi r18, 0x02 ; 2 a4: 31 05 cpc r19, r1 a6: 19 f0 breq .+6 ; 0xae <_Z20update_ship_movementv+0x1e> a8: 24 30 cpi r18, 0x04 ; 4 aa: 31 05 cpc r19, r1 ac: a9 f4 brne .+42 ; 0xd8 <_Z20update_ship_movementv+0x48> { erase_symbol_cells_from_screen(j,1); erase_symbol_cells_from_screen(j+1,1); ++j; // advance ship location ae: 4f 5f subi r20, 0xFF ; 255 ++shp_state; //advance logic state for a given symbol or ship b0: c9 01 movw r24, r18 b2: 01 96 adiw r24, 0x01 ; 1 default: // logic state like 0 .. just do nothing at this time break; } // end of logic state switch if (old_state != shp_state) b4: 28 17 cp r18, r24 b6: 39 07 cpc r19, r25 b8: 79 f0 breq .+30 ; 0xd8 <_Z20update_ship_movementv+0x48> { if (j == 16) ba: 40 31 cpi r20, 0x10 ; 16 bc: 31 f0 breq .+12 ; 0xca <_Z20update_ship_movementv+0x3a> shp_state = 0; //disable symbol that went off the screen j = 1; //re-define location back 1 when need to be used again } else { if (shp_state == 5) be: 85 30 cpi r24, 0x05 ; 5 c0: 91 05 cpc r25, r1 c2: 31 f4 brne .+12 ; 0xd0 <_Z20update_ship_movementv+0x40> { shp_state = 1; // re-start ship/symbol state back to 1 again - we assume ship or sybol has gone passed end of LCD screen c4: 81 e0 ldi r24, 0x01 ; 1 c6: 90 e0 ldi r25, 0x00 ; 0 c8: 03 c0 rjmp .+6 ; 0xd0 <_Z20update_ship_movementv+0x40> if (old_state != shp_state) { if (j == 16) { // check if ship/symbol has gone pass the screen on the right. shp_state = 0; //disable symbol that went off the screen j = 1; //re-define location back 1 when need to be used again ca: 41 e0 ldi r20, 0x01 ; 1 if (old_state != shp_state) { if (j == 16) { // check if ship/symbol has gone pass the screen on the right. shp_state = 0; //disable symbol that went off the screen cc: 80 e0 ldi r24, 0x00 ; 0 ce: 90 e0 ldi r25, 0x00 ; 0 { shp_state = 1; // re-start ship/symbol state back to 1 again - we assume ship or sybol has gone passed end of LCD screen } } ship_state[i] = (unsigned char) shp_state; // update ship's state d0: 80 93 02 01 sts 0x0102, r24 ship_location[i] = j; // update ship's location d4: 40 93 05 01 sts 0x0105, r20 } delay(10); d8: 6a e0 ldi r22, 0x0A ; 10 da: 70 e0 ldi r23, 0x00 ; 0 dc: 80 e0 ldi r24, 0x00 ; 0 de: 90 e0 ldi r25, 0x00 ; 0 e0: 0c 94 03 01 jmp 0x206 ; 0x206 000000e4 : //EsploraTFT.begin(); //EsploraTFT.background(0, 0, 0); for (unsigned char i=0; i < NUMBER_ITEM_SUPPORTED; i++) { ship_location[i] = 1; e4: 81 e0 ldi r24, 0x01 ; 1 e6: 80 93 05 01 sts 0x0105, r24 ea: 80 93 06 01 sts 0x0106, r24 ship_state[i] = 0; // disabled state for a given symbol ee: 10 92 03 01 sts 0x0103, r1 //EsploraTFT.begin(); //EsploraTFT.background(0, 0, 0); for (unsigned char i=0; i < NUMBER_ITEM_SUPPORTED; i++) { ship_location[i] = 1; f2: 80 93 07 01 sts 0x0107, r24 ship_state[i] = 0; // disabled state for a given symbol f6: 10 92 04 01 sts 0x0104, r1 } tick_marks = 0; fa: 10 92 01 01 sts 0x0101, r1 fe: 10 92 00 01 sts 0x0100, r1 ship_state[0] = 1; // enable destroyer type 102: 80 93 02 01 sts 0x0102, r24 106: 08 95 ret 00000108 : } void loop() { // put your main code here, to run repeatedly: update_ship_movement(); 108: 0e 94 48 00 call 0x90 ; 0x90 <_Z20update_ship_movementv> delay(16); 10c: 60 e1 ldi r22, 0x10 ; 16 10e: 70 e0 ldi r23, 0x00 ; 0 110: 80 e0 ldi r24, 0x00 ; 0 112: 90 e0 ldi r25, 0x00 ; 0 114: 0e 94 03 01 call 0x206 ; 0x206 ++tick_marks; 118: 80 91 00 01 lds r24, 0x0100 11c: 90 91 01 01 lds r25, 0x0101 120: 01 96 adiw r24, 0x01 ; 1 122: 90 93 01 01 sts 0x0101, r25 126: 80 93 00 01 sts 0x0100, r24 12a: 08 95 ret 0000012c <__vector_16>: #if defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) ISR(TIM0_OVF_vect) #else ISR(TIMER0_OVF_vect) #endif { 12c: 1f 92 push r1 12e: 0f 92 push r0 130: 0f b6 in r0, 0x3f ; 63 132: 0f 92 push r0 134: 11 24 eor r1, r1 136: 2f 93 push r18 138: 3f 93 push r19 13a: 8f 93 push r24 13c: 9f 93 push r25 13e: af 93 push r26 140: bf 93 push r27 // copy these to local variables so they can be stored in registers // (volatile variables must be read from memory on every access) unsigned long m = timer0_millis; 142: 80 91 09 01 lds r24, 0x0109 146: 90 91 0a 01 lds r25, 0x010A 14a: a0 91 0b 01 lds r26, 0x010B 14e: b0 91 0c 01 lds r27, 0x010C unsigned char f = timer0_fract; 152: 30 91 08 01 lds r19, 0x0108 m += MILLIS_INC; f += FRACT_INC; 156: 23 e0 ldi r18, 0x03 ; 3 158: 23 0f add r18, r19 if (f >= FRACT_MAX) { 15a: 2d 37 cpi r18, 0x7D ; 125 15c: 20 f4 brcc .+8 ; 0x166 <__vector_16+0x3a> // copy these to local variables so they can be stored in registers // (volatile variables must be read from memory on every access) unsigned long m = timer0_millis; unsigned char f = timer0_fract; m += MILLIS_INC; 15e: 01 96 adiw r24, 0x01 ; 1 160: a1 1d adc r26, r1 162: b1 1d adc r27, r1 164: 05 c0 rjmp .+10 ; 0x170 <__vector_16+0x44> f += FRACT_INC; if (f >= FRACT_MAX) { f -= FRACT_MAX; 166: 26 e8 ldi r18, 0x86 ; 134 168: 23 0f add r18, r19 m += 1; 16a: 02 96 adiw r24, 0x02 ; 2 16c: a1 1d adc r26, r1 16e: b1 1d adc r27, r1 } timer0_fract = f; 170: 20 93 08 01 sts 0x0108, r18 timer0_millis = m; 174: 80 93 09 01 sts 0x0109, r24 178: 90 93 0a 01 sts 0x010A, r25 17c: a0 93 0b 01 sts 0x010B, r26 180: b0 93 0c 01 sts 0x010C, r27 timer0_overflow_count++; 184: 80 91 0d 01 lds r24, 0x010D 188: 90 91 0e 01 lds r25, 0x010E 18c: a0 91 0f 01 lds r26, 0x010F 190: b0 91 10 01 lds r27, 0x0110 194: 01 96 adiw r24, 0x01 ; 1 196: a1 1d adc r26, r1 198: b1 1d adc r27, r1 19a: 80 93 0d 01 sts 0x010D, r24 19e: 90 93 0e 01 sts 0x010E, r25 1a2: a0 93 0f 01 sts 0x010F, r26 1a6: b0 93 10 01 sts 0x0110, r27 } 1aa: bf 91 pop r27 1ac: af 91 pop r26 1ae: 9f 91 pop r25 1b0: 8f 91 pop r24 1b2: 3f 91 pop r19 1b4: 2f 91 pop r18 1b6: 0f 90 pop r0 1b8: 0f be out 0x3f, r0 ; 63 1ba: 0f 90 pop r0 1bc: 1f 90 pop r1 1be: 18 95 reti 000001c0 : return m; } unsigned long micros() { unsigned long m; uint8_t oldSREG = SREG, t; 1c0: 3f b7 in r19, 0x3f ; 63 cli(); 1c2: f8 94 cli m = timer0_overflow_count; 1c4: 80 91 0d 01 lds r24, 0x010D 1c8: 90 91 0e 01 lds r25, 0x010E 1cc: a0 91 0f 01 lds r26, 0x010F 1d0: b0 91 10 01 lds r27, 0x0110 #if defined(TCNT0) t = TCNT0; 1d4: 26 b5 in r18, 0x26 ; 38 #else #error TIMER 0 not defined #endif #ifdef TIFR0 if ((TIFR0 & _BV(TOV0)) && (t < 255)) 1d6: a8 9b sbis 0x15, 0 ; 21 1d8: 05 c0 rjmp .+10 ; 0x1e4 1da: 2f 3f cpi r18, 0xFF ; 255 1dc: 19 f0 breq .+6 ; 0x1e4 m++; 1de: 01 96 adiw r24, 0x01 ; 1 1e0: a1 1d adc r26, r1 1e2: b1 1d adc r27, r1 #else if ((TIFR & _BV(TOV0)) && (t < 255)) m++; #endif SREG = oldSREG; 1e4: 3f bf out 0x3f, r19 ; 63 return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond()); 1e6: 66 27 eor r22, r22 1e8: 78 2f mov r23, r24 1ea: 89 2f mov r24, r25 1ec: 9a 2f mov r25, r26 1ee: 62 0f add r22, r18 1f0: 71 1d adc r23, r1 1f2: 81 1d adc r24, r1 1f4: 91 1d adc r25, r1 1f6: 42 e0 ldi r20, 0x02 ; 2 1f8: 66 0f add r22, r22 1fa: 77 1f adc r23, r23 1fc: 88 1f adc r24, r24 1fe: 99 1f adc r25, r25 200: 4a 95 dec r20 202: d1 f7 brne .-12 ; 0x1f8 } 204: 08 95 ret 00000206 : void delay(unsigned long ms) { 206: 8f 92 push r8 208: 9f 92 push r9 20a: af 92 push r10 20c: bf 92 push r11 20e: cf 92 push r12 210: df 92 push r13 212: ef 92 push r14 214: ff 92 push r15 216: 6b 01 movw r12, r22 218: 7c 01 movw r14, r24 uint32_t start = micros(); 21a: 0e 94 e0 00 call 0x1c0 ; 0x1c0 21e: 4b 01 movw r8, r22 220: 5c 01 movw r10, r24 while (ms > 0) { 222: c1 14 cp r12, r1 224: d1 04 cpc r13, r1 226: e1 04 cpc r14, r1 228: f1 04 cpc r15, r1 22a: f1 f0 breq .+60 ; 0x268 yield(); 22c: 0e 94 88 01 call 0x310 ; 0x310 while ( ms > 0 && (micros() - start) >= 1000) { 230: 0e 94 e0 00 call 0x1c0 ; 0x1c0 234: 68 19 sub r22, r8 236: 79 09 sbc r23, r9 238: 8a 09 sbc r24, r10 23a: 9b 09 sbc r25, r11 23c: 68 3e cpi r22, 0xE8 ; 232 23e: 73 40 sbci r23, 0x03 ; 3 240: 81 05 cpc r24, r1 242: 91 05 cpc r25, r1 244: 70 f3 brcs .-36 ; 0x222 ms--; 246: 21 e0 ldi r18, 0x01 ; 1 248: c2 1a sub r12, r18 24a: d1 08 sbc r13, r1 24c: e1 08 sbc r14, r1 24e: f1 08 sbc r15, r1 start += 1000; 250: 88 ee ldi r24, 0xE8 ; 232 252: 88 0e add r8, r24 254: 83 e0 ldi r24, 0x03 ; 3 256: 98 1e adc r9, r24 258: a1 1c adc r10, r1 25a: b1 1c adc r11, r1 { uint32_t start = micros(); while (ms > 0) { yield(); while ( ms > 0 && (micros() - start) >= 1000) { 25c: c1 14 cp r12, r1 25e: d1 04 cpc r13, r1 260: e1 04 cpc r14, r1 262: f1 04 cpc r15, r1 264: 29 f7 brne .-54 ; 0x230 266: dd cf rjmp .-70 ; 0x222 ms--; start += 1000; } } } 268: ff 90 pop r15 26a: ef 90 pop r14 26c: df 90 pop r13 26e: cf 90 pop r12 270: bf 90 pop r11 272: af 90 pop r10 274: 9f 90 pop r9 276: 8f 90 pop r8 278: 08 95 ret 0000027a : void init() { // this needs to be called before setup() or some functions won't // work there sei(); 27a: 78 94 sei // on the ATmega168, timer 0 is also used for fast hardware pwm // (using phase-correct PWM would mean that timer 0 overflowed half as often // resulting in different millis() behavior on the ATmega8 and ATmega168) #if defined(TCCR0A) && defined(WGM01) sbi(TCCR0A, WGM01); 27c: 84 b5 in r24, 0x24 ; 36 27e: 82 60 ori r24, 0x02 ; 2 280: 84 bd out 0x24, r24 ; 36 sbi(TCCR0A, WGM00); 282: 84 b5 in r24, 0x24 ; 36 284: 81 60 ori r24, 0x01 ; 1 286: 84 bd out 0x24, r24 ; 36 // this combination is for the standard atmega8 sbi(TCCR0, CS01); sbi(TCCR0, CS00); #elif defined(TCCR0B) && defined(CS01) && defined(CS00) // this combination is for the standard 168/328/1280/2560 sbi(TCCR0B, CS01); 288: 85 b5 in r24, 0x25 ; 37 28a: 82 60 ori r24, 0x02 ; 2 28c: 85 bd out 0x25, r24 ; 37 sbi(TCCR0B, CS00); 28e: 85 b5 in r24, 0x25 ; 37 290: 81 60 ori r24, 0x01 ; 1 292: 85 bd out 0x25, r24 ; 37 // enable timer 0 overflow interrupt #if defined(TIMSK) && defined(TOIE0) sbi(TIMSK, TOIE0); #elif defined(TIMSK0) && defined(TOIE0) sbi(TIMSK0, TOIE0); 294: ee e6 ldi r30, 0x6E ; 110 296: f0 e0 ldi r31, 0x00 ; 0 298: 80 81 ld r24, Z 29a: 81 60 ori r24, 0x01 ; 1 29c: 80 83 st Z, r24 // this is better for motors as it ensures an even waveform // note, however, that fast pwm mode can achieve a frequency of up // 8 MHz (with a 16 MHz clock) at 50% duty cycle #if defined(TCCR1B) && defined(CS11) && defined(CS10) TCCR1B = 0; 29e: e1 e8 ldi r30, 0x81 ; 129 2a0: f0 e0 ldi r31, 0x00 ; 0 2a2: 10 82 st Z, r1 // set timer 1 prescale factor to 64 sbi(TCCR1B, CS11); 2a4: 80 81 ld r24, Z 2a6: 82 60 ori r24, 0x02 ; 2 2a8: 80 83 st Z, r24 #if F_CPU >= 8000000L sbi(TCCR1B, CS10); 2aa: 80 81 ld r24, Z 2ac: 81 60 ori r24, 0x01 ; 1 2ae: 80 83 st Z, r24 sbi(TCCR1, CS10); #endif #endif // put timer 1 in 8-bit phase correct pwm mode #if defined(TCCR1A) && defined(WGM10) sbi(TCCR1A, WGM10); 2b0: e0 e8 ldi r30, 0x80 ; 128 2b2: f0 e0 ldi r31, 0x00 ; 0 2b4: 80 81 ld r24, Z 2b6: 81 60 ori r24, 0x01 ; 1 2b8: 80 83 st Z, r24 // set timer 2 prescale factor to 64 #if defined(TCCR2) && defined(CS22) sbi(TCCR2, CS22); #elif defined(TCCR2B) && defined(CS22) sbi(TCCR2B, CS22); 2ba: e1 eb ldi r30, 0xB1 ; 177 2bc: f0 e0 ldi r31, 0x00 ; 0 2be: 80 81 ld r24, Z 2c0: 84 60 ori r24, 0x04 ; 4 2c2: 80 83 st Z, r24 // configure timer 2 for phase correct pwm (8-bit) #if defined(TCCR2) && defined(WGM20) sbi(TCCR2, WGM20); #elif defined(TCCR2A) && defined(WGM20) sbi(TCCR2A, WGM20); 2c4: e0 eb ldi r30, 0xB0 ; 176 2c6: f0 e0 ldi r31, 0x00 ; 0 2c8: 80 81 ld r24, Z 2ca: 81 60 ori r24, 0x01 ; 1 2cc: 80 83 st Z, r24 #endif #if defined(ADCSRA) // set a2d prescaler so we are inside the desired 50-200 KHz range. #if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz sbi(ADCSRA, ADPS2); 2ce: ea e7 ldi r30, 0x7A ; 122 2d0: f0 e0 ldi r31, 0x00 ; 0 2d2: 80 81 ld r24, Z 2d4: 84 60 ori r24, 0x04 ; 4 2d6: 80 83 st Z, r24 sbi(ADCSRA, ADPS1); 2d8: 80 81 ld r24, Z 2da: 82 60 ori r24, 0x02 ; 2 2dc: 80 83 st Z, r24 sbi(ADCSRA, ADPS0); 2de: 80 81 ld r24, Z 2e0: 81 60 ori r24, 0x01 ; 1 2e2: 80 83 st Z, r24 cbi(ADCSRA, ADPS2); cbi(ADCSRA, ADPS1); sbi(ADCSRA, ADPS0); #endif // enable a2d conversions sbi(ADCSRA, ADEN); 2e4: 80 81 ld r24, Z 2e6: 80 68 ori r24, 0x80 ; 128 2e8: 80 83 st Z, r24 // here so they can be used as normal digital i/o; they will be // reconnected in Serial.begin() #if defined(UCSRB) UCSRB = 0; #elif defined(UCSR0B) UCSR0B = 0; 2ea: 10 92 c1 00 sts 0x00C1, r1 2ee: 08 95 ret 000002f0 : int atexit(void (* /*func*/ )()) { return 0; } // Weak empty variant initialization function. // May be redefined by variant files. void initVariant() __attribute__((weak)); void initVariant() { } 2f0: 08 95 ret 000002f2

: void setupUSB() __attribute__((weak)); void setupUSB() { } int main(void) { init(); 2f2: 0e 94 3d 01 call 0x27a ; 0x27a initVariant(); 2f6: 0e 94 78 01 call 0x2f0 ; 0x2f0 #if defined(USBCON) USBDevice.attach(); #endif setup(); 2fa: 0e 94 72 00 call 0xe4 ; 0xe4 for (;;) { loop(); if (serialEventRun) serialEventRun(); 2fe: c0 e0 ldi r28, 0x00 ; 0 300: d0 e0 ldi r29, 0x00 ; 0 #endif setup(); for (;;) { loop(); 302: 0e 94 84 00 call 0x108 ; 0x108 if (serialEventRun) serialEventRun(); 306: 20 97 sbiw r28, 0x00 ; 0 308: e1 f3 breq .-8 ; 0x302 30a: 0e 94 00 00 call 0 ; 0x0 <__vectors> 30e: f9 cf rjmp .-14 ; 0x302 00000310 : * libraries or sketches that supports cooperative threads. * * Its defined as a weak symbol and it can be redefined to implement a * real cooperative scheduler. */ static void __empty() { 310: 08 95 ret 00000312 <_exit>: 312: f8 94 cli 00000314 <__stop_program>: 314: ff cf rjmp .-2 ; 0x314 <__stop_program>