SPI on the Zero

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Wayne Holder

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Jul 17, 2015, 6:48:44 AM7/17/15
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Can someone explain how the SPI interface is supposed to work on the Zero?  I've scratched my head bald, but I still can't figure out out.  There are several mysteries I can't unravel:

1. On the Zero Schematic, data pins 10-13 are labelled SS, MOSI, MISO and SCK, respectively, and are, in turn, connected to PA18, PA16, PA19 and PA17, also respectively.  However, unlike on the UNO, and boards of a similar form factor to the Zero, these pins are not connected to the 6 pin, ICSP port.  Instead, for the ICSP, MOSI connects to PB10 (pin 19), MISO to PA12 (pin 21) and SCK to PB11 (pin 20).  However, in looking in the SPI.c/h and variant.h, it seems that it uses pin 23 (PA14) as MOSI, pin 22 (PA13) as MISO and pin 24 (PA15) as SCK).  So, which set of pins are used by the SPI library?

2. I'm having trouble understanding the pin multiplexing architecture in the D21G.  Since there are 6 independent SERCOM units in the D21G, it seems like there should be 6 different possible hardware SPI interfaces but, even after poring over the full, 1077 page data sheet, I can't seem to figure out how, for example, which pins correspond to SS, MISO, MISO and SCK for SERCOM2, or SERCOM3, etc.  The data sheet has a table that shows how pins 13-16 connect to PAD[0] - PAD[3] of SERCOM2, but but is PAD[0] the MISO pin, or the MOSI pin?  it doesn't to state this anywhere I've yet to find.  I might have a better time understanding my issue #1 if I could figure out how pins map to specialized functions like the SPI pins.

3. Was the Zero signed to be backward compatible with things like this tutorial that show using pins 10-13 as the SPI interface?  Or, was the assumption made that only shields would need the SPI interface and would get to it via the ICSP port connector?  It seems like it would have been possible to make the SPI Zero's SPI interface compatible with Arduino boards of the same form factor, such as the UNO, etc.  Was this not done for some practical reason I'm not aware of?

Wayne

Andrew Kroll

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Jul 17, 2015, 6:50:00 AM7/17/15
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Use the ICSP port. :-)

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David Freitag

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Jul 17, 2015, 4:46:46 PM7/17/15
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On Friday, July 17, 2015 at 6:48:44 AM UTC-4, wayne.holder wrote:

2. I'm having trouble understanding the pin multiplexing architecture in the D21G.  Since there are 6 independent SERCOM units in the D21G, it seems like there should be 6 different possible hardware SPI interfaces but, even after poring over the full, 1077 page data sheet, I can't seem to figure out how, for example, which pins correspond to SS, MISO, MISO and SCK for SERCOM2, or SERCOM3, etc.  The data sheet has a table that shows how pins 13-16 connect to PAD[0] - PAD[3] of SERCOM2, but but is PAD[0] the MISO pin, or the MOSI pin?  it doesn't to state this anywhere I've yet to find.  I might have a better time understanding my issue #1 if I could figure out how pins map to specialized functions like the SPI pins.

Not only are there 6 different SPI peripherals, but there are also 16 different pinmux configurations for each peripheral (in both master and slave mode!). I don't think I care to admit how many coasters I have now as a result of confusion over the SERCOM pads. The worst part is that none of this information is (at least readily apparent) in the datasheet. I believe the following link should clear some things up. Unfortunately it seems the ASF docs are pretty much necessary when developing with the SAMD devices.


Wayne Holder

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Jul 20, 2015, 4:40:40 AM7/20/15
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Thanks for the ink to the ASF documentation.  That helps put things in perspective, but I'm going to have to dig into it a bit more before I can understand it.  I'm guessing that the configuration options on these chips is complex enough that it needs it own abstraction layer (or, at least that what it seems like what ASF is intended for.)

Wayne

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