Q: newsub and implicit registers
Melvin Smith
are not part of the instruction.
IMCC currently has a problem with this; if we have a register linked
to the instruction for data flow analysis and allocation, it will be emitted
as part of the opcode.
Either we declare that all PASM instructions must include the registers
they modify (I don't think this is feasible, but I'm not sure).....
or IMCC has to track implicit registers.
In either case, I don't like that we have 2 versions of newsub, one that has a
Px destination register and one that has P0/P1 hardcoded.
I know the calling convention says P0/P1, but what do we gain
by hiding it at the PASM level when we can hide it with IMCC?
-Melvin
Leopold Toetsch
> The 2nd version of newsub implicitly sets P0 and P1, but they
> are not part of the instruction.
Yeah. But we really have a lot more of such instructions: invoke or
stack.ops for example.
> or IMCC has to track implicit registers.
cfg.c:109 in my tree. invoke and invokecc are handled there too.
> I know the calling convention says P0/P1, but what do we gain
> by hiding it at the PASM level when we can hide it with IMCC?
The 4 argument form of newsub isn't really needed, that's right.
> -Melvin
leo
Melvin Smith
>Melvin Smith <mrjol...@mindspring.com> wrote:
> > The 2nd version of newsub implicitly sets P0 and P1, but they
> > are not part of the instruction.
>
>Yeah. But we really have a lot more of such instructions: invoke or
>stack.ops for example.
>
> > or IMCC has to track implicit registers.
>
>cfg.c:109 in my tree. invoke and invokecc are handled there too.
Ok, I'll have a look.
Thanks,
-Melvin