Is it possible and/or meaningful to read and write from a part of a
register(e.g. a single word) in pasm?
As with my previous questions, I'm not really interested in pbc
issues/format(with exceptions of course), just learning the intricacies
of pasm.
-Tupshin
> Is it possible and/or meaningful to read and write from a part of a
> register(e.g. a single word) in pasm?
We have a very limited subset in dotgnu.ops.
> -Tupshin
leo
I always thought bitwise "and" and "or" were the things to use to modify
partial content ?. Though I can't say if that makes sense because
INTVAL is not fixed and neither is the endianess of registers (IIRC they
are not fixed ?).
> We have a very limited subset in dotgnu.ops.
Those were written to support the fixed size integers and longs that
C# needs (Int32 & Friends). I think you could "convert" from/to sized
integer values with those opcodes (conv_u4,conv_i4...).
Parrot codegen for C# still awaits the second coming of the prophet Zarquon..
(to be accurate -- Object instructions ;)
Gopal
--
The difference between insanity and genius is measured by success
At the moment no, and they'd only really be useful for the integer
registers. Having said that, which ones would you want? I don't mind
us thinking about an intreg.ops set.
--
Dan
--------------------------------------"it's like this"-------------------
Dan Sugalski even samurai
d...@sidhe.org have teddy bears and even
teddy bears get drunk
> At 6:54 PM -0800 2/22/03, Tupshin Harper wrote:
>
>> Sorry for all the questions...these are the trials and tribulations
>> of dealing with a newbie trying to get up to speed with the current
>> state of parrot. So here's another question:
>>
>> Is it possible and/or meaningful to read and write from a part of a
>> register(e.g. a single word) in pasm?
>
>
> At the moment no, and they'd only really be useful for the integer
> registers. Having said that, which ones would you want? I don't mind
> us thinking about an intreg.ops set.
I actually *don't* necessarily want to. The question only came up
becasue virtually all real CPUs allow you to do this to conserve
registers, and I'm just trying to understand how and why a VM like
parrot diverges from the concepts/semantics of a real CPU. If this kind
of optimization is to take place, it sems like it would have to take
place on the fly (JIT level) once the system knew what kind of target
CPU it was running on, and that it wouldn't be meaningful to do so at
the pasm or pbc generation levels(except possibly as a hinting
mechanism). Does this make sense, or am I smoking crack?
-Tupshin