updated CDROMREADAUDIO DMA patch
Andrew Morton
be helpful if a few (or a lot of) people could test this, and report
on the result. Otherwise it'll never get anywhere...
Reading audio from IDE CDROMs always uses PIO. This patch teaches the kernel
to use DMA for the CDROMREADAUDIO ioctl.
Total time to read a CD using cdparanoia improves by up to 20%. But
sometimes there is no change.
Total CPU load decreases greatly. On a 700 MHz VIA C3 with 82C6xx
Southbridge the CPU load during the rip falls from 85% to 9%.
On an 850MHz P3 with piix chipset CPU load falls from 76% to 8%.
These loads cannot be observed with `top' or `ps' - it all happens at
interrupt time. I measure with `cyclesoak'.
Recovery from media errors has been tested, works OK.
Recovery from DMA errors has been simulated. It falls back to PIO mode OK.
The cdrom needs to be set into DMA mode (hdparm -d1 /dev/cdrom) for this code
to have an effect. I find that
hdparm -c1 -u1 -d1 /dev/cdrom
works nicely.
drivers/cdrom/cdrom.c | 151 +++++++++++++++++++++++++++++++++-----------------
drivers/ide/ide-cd.c | 62 +++++++++++++++++++-
drivers/ide/ide-cd.h | 1
include/linux/cdrom.h | 9 ++
4 files changed, 171 insertions(+), 52 deletions(-)
--- 24/drivers/cdrom/cdrom.c~ide-akpm Sat Jan 4 14:57:36 2003
+++ 24-akpm/drivers/cdrom/cdrom.c Sat Jan 4 14:57:36 2003
@@ -1911,6 +1911,107 @@ static int cdrom_do_cmd(struct cdrom_dev
return ret;
}
+/*
+ * CDROM audio read, with DMA support. Added in 2.4.18-pre4, akpm.
+ *
+ * Initially, we try to perform multiframe bus-mastering. If the IDE
+ * layer experiences a DMA error, we fall back to single-frame DMA.
+ * If the IDE layer again detects a DMA error, we fall back to multiframe
+ * PIO.
+ *
+ * We do not want to disable drive-level DMA at any stage, because
+ * some devices can perform non-packet DMA quite happily, but appear
+ * to not be able to perform packet DMA correctly.
+ *
+ * If the drive is not using_dma, we never attempt packet DMA.
+ */
+static int cdda_read_audio(int cmd,
+ struct cdrom_device_info *cdi,
+ struct cdrom_generic_command *cgc,
+ struct cdrom_read_audio *ra)
+{
+ int lba;
+ unsigned frames_todo;
+ int ret;
+ void *xferbuf = 0;
+ unsigned nr_local_frames;
+ char *useraddr;
+
+ ret = -EINVAL;
+ if (ra->addr_format == CDROM_MSF) {
+ lba = msf_to_lba(ra->addr.msf.minute,
+ ra->addr.msf.second,
+ ra->addr.msf.frame);
+ } else if (ra->addr_format == CDROM_LBA) {
+ lba = ra->addr.lba;
+ } else {
+ goto out;
+ }
+
+ if (lba < 0 || ra->nframes <= 0)
+ goto out;
+
+ /*
+ * We can't sensibly support more that 64k because we later
+ * use a buffer_head to map the temp buffer. And b_count is
+ * unsigned short.
+ */
+ nr_local_frames = ra->nframes;
+ if (nr_local_frames * CD_FRAMESIZE_RAW > 32768)
+ nr_local_frames = 32768 / CD_FRAMESIZE_RAW;
+
+ if (cdi->dma_mode == CDROM_DMA_SINGLE)
+ nr_local_frames = 1;
+
+ do {
+ xferbuf = kmalloc(CD_FRAMESIZE_RAW * nr_local_frames, GFP_KERNEL);
+ } while (!xferbuf && nr_local_frames--);
+ ret = -ENOMEM;
+ if (!xferbuf)
+ goto out;
+
+ cgc->buffer = xferbuf;
+ cgc->data_direction = CGC_DATA_READ;
+ if (cdi->dma_mode != CDROM_DMA_NONE)
+ cgc->do_dma = 1;
+ frames_todo = ra->nframes;
+ useraddr = ra->buf;
+retry:
+ while (frames_todo) {
+ unsigned frames_now = min(frames_todo, nr_local_frames);
+
+ cgc->dma_error = 0;
+ ret = cdrom_read_block(cdi, cgc, lba, frames_now, 1, CD_FRAMESIZE_RAW);
+ if (ret) {
+ /*
+ * Here we implement DMA size fallback
+ */
+ if (cgc->dma_error && cdi->dma_mode == CDROM_DMA_MULTI) {
+ printk(KERN_WARNING "CDROM: falling back to "
+ "single frame DMA\n");
+ cdi->dma_mode = CDROM_DMA_SINGLE;
+ nr_local_frames = 1;
+ goto retry;
+ } else if (cgc->dma_error && cdi->dma_mode == CDROM_DMA_SINGLE) {
+ printk(KERN_WARNING "CDROM: disabled DMA\n");
+ cdi->dma_mode = CDROM_DMA_NONE;
+ goto retry;
+ }
+ goto out;
+ }
+ ret = -EFAULT;
+ if (copy_to_user(useraddr, cgc->buffer, CD_FRAMESIZE_RAW * frames_now))
+ goto out;
+ useraddr += CD_FRAMESIZE_RAW * frames_now;
+ frames_todo -= frames_now;
+ lba += frames_now;
+ }
+ ret = 0;
+out:
+ kfree(xferbuf);
+ return ret;
+}
+
static int mmc_ioctl(struct cdrom_device_info *cdi, unsigned int cmd,
unsigned long arg)
{
@@ -1977,57 +2078,9 @@ static int mmc_ioctl(struct cdrom_device
}
case CDROMREADAUDIO: {
struct cdrom_read_audio ra;
- int lba, nr;
IOCTL_IN(arg, struct cdrom_read_audio, ra);
-
- if (ra.addr_format == CDROM_MSF)
- lba = msf_to_lba(ra.addr.msf.minute,
- ra.addr.msf.second,
- ra.addr.msf.frame);
- else if (ra.addr_format == CDROM_LBA)
- lba = ra.addr.lba;
- else
- return -EINVAL;
-
- /* FIXME: we need upper bound checking, too!! */
- if (lba < 0 || ra.nframes <= 0)
- return -EINVAL;
-
- /*
- * start with will ra.nframes size, back down if alloc fails
- */
- nr = ra.nframes;
- do {
- cgc.buffer = kmalloc(CD_FRAMESIZE_RAW * nr, GFP_KERNEL);
- if (cgc.buffer)
- break;
-
- nr >>= 1;
- } while (nr);
-
- if (!nr)
- return -ENOMEM;
-
- if (!access_ok(VERIFY_WRITE, ra.buf, ra.nframes*CD_FRAMESIZE_RAW)) {
- kfree(cgc.buffer);
- return -EFAULT;
- }
- cgc.data_direction = CGC_DATA_READ;
- while (ra.nframes > 0) {
- if (nr > ra.nframes)
- nr = ra.nframes;
-
- ret = cdrom_read_block(cdi, &cgc, lba, nr, 1, CD_FRAMESIZE_RAW);
- if (ret)
- break;
- __copy_to_user(ra.buf, cgc.buffer, CD_FRAMESIZE_RAW*nr);
- ra.buf += CD_FRAMESIZE_RAW * nr;
- ra.nframes -= nr;
- lba += nr;
- }
- kfree(cgc.buffer);
- return ret;
+ return cdda_read_audio(cmd, cdi, &cgc, &ra);
}
case CDROMSUBCHNL: {
struct cdrom_subchnl q;
--- 24/drivers/ide/ide-cd.c~ide-akpm Sat Jan 4 14:57:36 2003
+++ 24-akpm/drivers/ide/ide-cd.c Sat Jan 4 14:57:36 2003
@@ -1449,9 +1449,25 @@ static ide_startstop_t cdrom_pc_intr (id
int ireason, len, stat, thislen;
struct request *rq = HWGROUP(drive)->rq;
struct packet_command *pc = (struct packet_command *)rq->buffer;
+ struct cdrom_info *info = drive->driver_data;
+ int dma = info->dma;
+ int dma_error;
ide_startstop_t startstop;
u8 lowcyl = 0, highcyl = 0;
+ if (dma) {
+ info->dma = 0;
+ if ((dma_error = HWIF(drive)->ide_dma_end(drive))) {
+ /*
+ * We don't disable drive DMA for packet DMA errors.
+ * It's handled in cdda_read_audio()
+ */
+ /* HWIF(drive)->dmaproc(ide_dma_off, drive); */
+ pc->stat = 2; /* 2 -> DMA error */
+ printk(KERN_ERR "CDROM packet DMA error\n");
+ }
+ }
+
/* Check for errors. */
if (cdrom_decode_status(&startstop, drive, 0, &stat))
return startstop;
@@ -1463,6 +1479,14 @@ static ide_startstop_t cdrom_pc_intr (id
len = lowcyl + (256 * highcyl);
+ if (dma) {
+ /*
+ * If DMA succeeded, we have all the data
+ */
+ pc->buffer += pc->buflen;
+ pc->buflen = 0;
+ }
+
/* If DRQ is clear, the command has completed.
Complain if we still have data left to transfer. */
if ((stat & DRQ_STAT) == 0) {
@@ -1568,7 +1592,11 @@ static ide_startstop_t cdrom_do_packet_c
struct packet_command *pc = (struct packet_command *)rq->buffer;
struct cdrom_info *info = drive->driver_data;
- info->dma = 0;
+ if (rq->bh) {
+ info->dma = 1;
+ } else {
+ info->dma = 0;
+ }
info->cmd = 0;
pc->stat = 0;
len = pc->buflen;
@@ -1591,6 +1619,13 @@ void cdrom_sleep (int time)
} while (sleep);
}
+/*
+ * end_buffer_io_sync() is not exported
+ */
+static void cdrom_end_buffer_io_sync(struct buffer_head *bh, int uptodate)
+{
+}
+
static
int cdrom_queue_packet_command(ide_drive_t *drive, struct packet_command *pc)
{
@@ -1603,7 +1638,25 @@ int cdrom_queue_packet_command(ide_drive
/* Start of retry loop. */
do {
+ struct buffer_head bh;
+
ide_init_drive_cmd (&req);
+
+ if (pc->do_dma) {
+ /* Hack up a buffer_head for IDE DMA's use */
+ memset(&bh, 0, sizeof(bh));
+ bh.b_size = pc->buflen;
+ bh.b_data = pc->buffer;
+ bh.b_state = (1 << BH_Lock) | (1 << BH_Mapped) |
+ (1 << BH_Req);
+ bh.b_end_io = cdrom_end_buffer_io_sync;
+#if 0 /* Needed by end_buffer_io_sync, but not cdrom_end_buffer_io_sync */
+ atomic_set(&bh.b_count, 1);
+ init_waitqueue_head(&bh.b_wait);
+#endif
+ req.bh = &bh;
+ }
+
req.cmd = PACKET_COMMAND;
req.buffer = (char *)pc;
ide_do_drive_cmd(drive, &req, ide_wait);
@@ -2352,7 +2405,12 @@ static int ide_cdrom_packet(struct cdrom
pc.quiet = cgc->quiet;
pc.timeout = cgc->timeout;
pc.sense = cgc->sense;
- return cgc->stat = cdrom_queue_packet_command(drive, &pc);
+ if (cgc->do_dma && drive->using_dma)
+ pc.do_dma = 1;
+ cgc->stat = cdrom_queue_packet_command(drive, &pc);
+ if (pc.stat == 2) /* DMA error: fall back to lower mode */
+ cgc->dma_error = 1;
+ return cgc->stat;
}
static
--- 24/drivers/ide/ide-cd.h~ide-akpm Sat Jan 4 14:57:36 2003
+++ 24-akpm/drivers/ide/ide-cd.h Sat Jan 4 14:59:29 2003
@@ -111,6 +111,7 @@ struct packet_command {
int quiet;
int timeout;
struct request_sense *sense;
+ int do_dma;
unsigned char c[12];
};
--- 24/include/linux/cdrom.h~ide-akpm Sat Jan 4 14:57:36 2003
+++ 24-akpm/include/linux/cdrom.h Sat Jan 4 15:01:11 2003
@@ -287,6 +287,8 @@ struct cdrom_generic_command
unsigned char data_direction;
int quiet;
int timeout;
+ int do_dma; /* Try to use DMA */
+ int dma_error; /* A DMA_specific error occurred */
void *reserved[1];
};
@@ -743,10 +745,15 @@ struct cdrom_device_info {
char name[20]; /* name of the device type */
/* per-device flags */
__u8 sanyo_slot : 2; /* Sanyo 3 CD changer support */
- __u8 reserved : 6; /* not used yet */
+ __u8 dma_mode : 2; /* See below */
+ __u8 reserved : 4; /* not used yet */
struct cdrom_write_settings write;
};
+#define CDROM_DMA_MULTI 0 /* Multiframe DMA (default) */
+#define CDROM_DMA_SINGLE 1 /* Single frame DMA */
+#define CDROM_DMA_NONE 2 /* Multiframe PIO */
+
struct cdrom_device_ops {
/* routines */
int (*open) (struct cdrom_device_info *, int);
_
-
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Tony Spinillo
I tried the patch on 2.4.21pre2. In the short time that it has been on,
it seems
to be working. To test, I did this before the patch:
cdda2wav -D /dev/cdrom -e -N, then fired up Quake3,
the game was very stuttery. CD music played fine. After patching,
the game played smooth, game sounds were smooth
as well as the CD music.
I will bat it around more and report any problems.
Thanks!
Tony
lspci - INTEL 845PESVL motherboard:
00:00.0 Host bridge: Intel Corp. 82845G/GL [Brookdale-G] Chipset Host
Bridge (rev 02)
Subsystem: Intel Corp. 82845G/GL [Brookdale-G] Chipset Host Bridge
Flags: bus master, fast devsel, latency 0
Memory at e0000000 (32-bit, prefetchable) [size=256M]
Capabilities: [e4] #09 [6105]
Capabilities: [a0] AGP version 2.0
00:01.0 PCI bridge: Intel Corp. 82845G/GL [Brookdale-G] Chipset AGP
Bridge (rev 02) (prog-if 00 [Normal decode])
Flags: bus master, 66Mhz, fast devsel, latency 32
Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
Memory behind bridge: fc500000-fe5fffff
Prefetchable memory behind bridge: cc100000-dc2fffff
00:1d.0 USB Controller: Intel Corp. 82801DB USB (Hub #1) (rev 02)
(prog-if 00 [UHCI])
Subsystem: Intel Corp.: Unknown device 5356
Flags: bus master, medium devsel, latency 0, IRQ 16
I/O ports at e800 [size=32]
00:1d.1 USB Controller: Intel Corp. 82801DB USB (Hub #2) (rev 02)
(prog-if 00 [UHCI])
Subsystem: Intel Corp.: Unknown device 5356
Flags: bus master, medium devsel, latency 0, IRQ 19
I/O ports at e880 [size=32]
00:1d.2 USB Controller: Intel Corp. 82801DB USB (Hub #3) (rev 02)
(prog-if 00 [UHCI])
Subsystem: Intel Corp.: Unknown device 5356
Flags: bus master, medium devsel, latency 0, IRQ 18
I/O ports at ec00 [size=32]
00:1d.7 USB Controller: Intel Corp. 82801DB USB EHCI Controller (rev
02) (prog-if 20 [EHCI])
Subsystem: Intel Corp.: Unknown device 5356
Flags: bus master, medium devsel, latency 0, IRQ 23
Memory at febffc00 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Capabilities: [58] #0a [2080]
00:1e.0 PCI bridge: Intel Corp. 82801BA/CA/DB PCI Bridge (rev 82)
(prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0
Bus: primary=00, secondary=02, subordinate=02, sec-latency=32
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: fe600000-feafffff
Prefetchable memory behind bridge: dc300000-dc3fffff
00:1f.0 ISA bridge: Intel Corp. 82801DB ISA Bridge (LPC) (rev 02)
Flags: bus master, medium devsel, latency 0
00:1f.1 IDE interface: Intel Corp. 82801DB ICH4 IDE (rev 02) (prog-if
8a [Master SecP PriP])
Subsystem: Intel Corp.: Unknown device 5356
Flags: bus master, medium devsel, latency 0, IRQ 18
I/O ports at <unassigned> [size=8]
I/O ports at <unassigned> [size=4]
I/O ports at <unassigned> [size=8]
I/O ports at <unassigned> [size=4]
I/O ports at ffa0 [size=16]
Memory at 40000000 (32-bit, non-prefetchable) [disabled] [size=1K]
00:1f.3 SMBus: Intel Corp. 82801DB SMBus (rev 02)
Subsystem: Intel Corp.: Unknown device 5356
Flags: medium devsel, IRQ 17
I/O ports at e480 [size=32]
01:00.0 VGA compatible controller: nVidia Corporation NV25 [GeForce4
Ti4600] (rev a2) (prog-if 00 [VGA])
Flags: bus master, 66Mhz, medium devsel, latency 248, IRQ 16
Memory at fd000000 (32-bit, non-prefetchable) [size=16M]
Memory at d0000000 (32-bit, prefetchable) [size=128M]
Memory at dc280000 (32-bit, prefetchable) [size=512K]
Expansion ROM at fe5e0000 [disabled] [size=128K]
Capabilities: [60] Power Management version 2
Capabilities: [44] AGP version 2.0
02:01.0 SCSI storage controller: Adaptec AHA-3960D / AIC-7899A U160/m
(rev 01)
Subsystem: Adaptec AHA-3960D U160/m
Flags: bus master, 66Mhz, medium devsel, latency 32, IRQ 22
BIST result: 00
I/O ports at d400 [disabled] [size=256]
Memory at feafe000 (64-bit, non-prefetchable) [size=4K]
Expansion ROM at feaa0000 [disabled] [size=128K]
Capabilities: [dc] Power Management version 2
02:01.1 SCSI storage controller: Adaptec AHA-3960D / AIC-7899A U160/m
(rev 01)
Subsystem: Adaptec AHA-3960D U160/m
Flags: bus master, 66Mhz, medium devsel, latency 32, IRQ 21
BIST result: 00
I/O ports at d800 [disabled] [size=256]
Memory at feaff000 (64-bit, non-prefetchable) [size=4K]
Expansion ROM at feac0000 [disabled] [size=128K]
Capabilities: [dc] Power Management version 2
02:03.0 Multimedia audio controller: IC Ensemble Inc ICE1712 [Envy24]
(rev 02)
Subsystem: IC Ensemble Inc: Unknown device d634
Flags: bus master, medium devsel, latency 32, IRQ 19
I/O ports at dc00 [size=32]
I/O ports at d080 [size=16]
I/O ports at d000 [size=16]
I/O ports at df00 [size=64]
Capabilities: [80] Power Management version 1
02:05.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100]
(rev 08)
Subsystem: IBM 10/100 EtherJet Management Adapter
Flags: bus master, medium devsel, latency 32, IRQ 18
Memory at feafd000 (32-bit, non-prefetchable) [size=4K]
I/O ports at de80 [size=64]
Memory at fe900000 (32-bit, non-prefetchable) [size=1M]
Expansion ROM at fe800000 [disabled] [size=1M]
Capabilities: [dc] Power Management version 2
02:08.0 Ethernet controller: Intel Corp. 82801BD PRO/100 VE (LOM)
Ethernet Controller (rev 82)
Subsystem: Intel Corp.: Unknown device 3015
Flags: bus master, medium devsel, latency 32, IRQ 20
Memory at feafc000 (32-bit, non-prefetchable) [size=4K]
I/O ports at de00 [size=64]
Capabilities: [dc] Power Management version 2