I'm pleased to announce the initial release of Confluence 0.1;
a new hardware design language created by Launchbird Design Systems, Inc.
Confluence is a simple, yet high expressive language
that compiles into Verilog, VHDL, and C.
Its implicit parallelism and modular style still feels like coding in Verilog
or VHDL, yet the features of the language provide a level of flexibility
unknown to either of the two.
We are currently in the process of assembling a group of systems coded in
Confluence to act as both benchmarks and as tutorials for our customers.
The code generated from two of these systems has already been released to
OpenCores.org:
http://www.opencores.org/projects/cf_fft/
http://www.opencores.org/projects/cf_cordic/
To give you an idea of the typical code density, the bulk of CF_Cordic was
written in just under 100 lines of Confluence code and CF_FFT was only
twice that.
Our team has been developing Confluence for close to a year and we
feel the time is right to slowly release this product into the market.
We are looking for design engineers and consultants not afraid to learn
a new language to join our Confluence Beta Program.
Drop me a line if interested.
Regards,
Tom
PS: Please excuse the website. We're pouring our resources into development.
--
Tom Hawkins to...@launchbird.com
Launchbird Design Systems, Inc. http://www.launchbird.com/
Great, just what the world needs another HDL!
So who are the people behind it, and why?
Will the language be open?
The ASIC world has already seen most of the C languages die off,
SystemC will probably stick around though, maybe HandelC.
Verilog is now splitting into multiple forks, but IMHO Superlog is the
way to go!
Verilog/VHDL have been under the same committe now for awhile so that
war is over.
Verilog RTL can already be compiled to efficient C, I do it, others
have too.
JJ
--
Caleb Hess he...@cs.indiana.edu