KL10 power supply (was RE>FREE VAXen)
Joe Smith
>>That's not a problem. The VAX 11/780 doesn't really use 3 phase power.
>
>Does anyone know what the story is with the KL10 (DECSYSTEM-2060)?
>Do the power supplies really use 3-phase, or is it all split off into
>single-phase like a 780 or 11/70?
The original power supplieds do use all 3 phases. They go to a humungous
three-phase transformer, then to a 6-diode bridge rectifier, in order to
supply +5v at many amps. This power supply shuts down if any one of
the phases goes out. The missing-phase detector looks at the amplitude
of the 360 Hz ripple voltage coming off the bridge rectifier, and triggers
a shutdown if any one of the phases is not doing its job. (This question
came up at a PDP-10 hardware maintainence class I took years ago.)
>intimidating... Anyway what other options are there? I've been thinking
>of replacing the power supplies with switchers, one voltage at a time,
>is there any danger in this (i.e. sequencing or ripple or something?)?
> John Wilson
Several companies have narrowed a KL-1090 from 3 bays to 2 after replacing
all the analog power supplies with more modern switching units. I don't
know how much can be done to downsize a KL-1091/KL-2060.
-Joe
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Doug Humphrey
>>Do the power supplies really use 3-phase, or is it all split off into
>>single-phase like a 780 or 11/70?
>
>The original power supplieds do use all 3 phases.
The KA-10 did not require 3 phase power (though the RP02's and
stuff that you might have with it required at least 2 phase for
the motors...) Mine was, for most of its life, powered by 3 people
(generally some combination of Carl Zwanzig, Fred Bauer, Richard
Butler, and myself) standing at 3 different wall outlets in my
apartment (on seperate breakers, of course!) and counting
1...2...3!
and all plugging them in at the same time (roughly). Never seemed
to phase the old 10 (so to speak) but remember that the only IC's
in the whole machine were the "fast memory" in the 16 "register"
addresses (B250 boards), and the relocate and protect registers
(B199 boards?) so it wasn't exactly a static sensitive kinda machine...
Doug
Perry Lovill
> In article <336777$r...@usenet.rpi.edu> wil...@alum01.its.rpi.edu (John Wilson) writes:
> >intimidating... Anyway what other options are there? I've been thinking
> >of replacing the power supplies with switchers, one voltage at a time,
> >is there any danger in this (i.e. sequencing or ripple or something?)?
> > John Wilson
>
> Several companies have narrowed a KL-1090 from 3 bays to 2 after replacing
> all the analog power supplies with more modern switching units. I don't
> know how much can be done to downsize a KL-1091/KL-2060.
>
> -Joe
KL-2060 ? Clue me in, I didn't know of any KL-10 other than 1090's.
So there were sub-models? Was this true for KA's, KI's, and KS's as well ?
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Perry Lovill Consultant/System Administrator Lanier Worldwide, Inc.
#define DISCLAIMER_TXT "I neither speak for, nor work for, Lanier, Inc."
Joe Smith
>KL-2060 ? Clue me in, I didn't know of any KL-10 other than 1090's.
>So there were sub-models? Was this true for KA's, KI's, and KS's as well ?
Here is an old document of mine. It is 132 columns wide. Any corrections
to the document are welcome.
-Joe
This is a list of the PDP-10 processors as I understand them. Much of the information has yet to be verified.
Joe Smith, 21-Oct-83
PDP-10 Features 1050 1070 1080 1090PA 1090PV 1091 2020 2040PA 2040PV 2050PA 2050PV 2060 "C" "R"
==================== ==== ==== ==== ==== ==== ==== ==== ==== ===== ==== ==== ==== ==== ====
CPU type KA KI KL-A KL-B KL-D KL-E KS KL-B KL-D KL-B KL-D KL-E KL-? KL-E
Model-B backplane ucode -- -- No No Yes Yes -- No Yes No Yes Yes Better Yes
Clock speed nanoseconds Async Async 40 40 33 33 50 40 33 40 33 33 33 33
Extended sections No page None None None 32 32 1 None 32 None 32 32 32 32
G-floating No DF No No No Yes Yes ? No Yes No Yes Yes Yes Yes
RH20 internal channels No No No Yes Yes Yes No Yes Yes Yes Yes Yes Yes CI
Size of Cache -- -- 2048 2048 2048 2048 512 0 0 2048 2048 2048 4096 2048
I/O bus or Unibus I/O I/O I/O I/O I/O I/O Uni No IOB No IOB No IOB No IOB Option Option NI
Internal memory No No No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes
Size of cabinets Tall Tall Tall Tall Tall Tall Short Short Short Short Short Short Short Jupiter
Console Front-End None None 11/40 11/40 11/40 11/40 8080 11/40 11/40 11/40 11/40 11/40 11/40 11/40
Bootstrap device -- -- DECtape DECtape DECtape Floppy Magtape Floppy Floppy Floppy Floppy Floppy Floppy Floppy
Runs TOPS-10 7.01 No Yes Yes Yes Yes Yes Yes No No No No Maybe Maybe No
Runs TOPS-10 7.02 No No No No Yes Yes Yes No No No No Maybe Maybe No
Runs TOPS-10 7.03 No No No No Yes Yes Yes No No No No Maybe Yes Yes
Runs TOPS-20 rel 4 No No No No No Maybe Yes Yes Yes Yes Yes Yes Yes No
Runs TOPS-20 rel 5 No No No No No Maybe No Yes Yes Yes Yes Yes Yes No
Runs TOPS-20 rel 6 No No No No No Maybe No No No No No Yes Yes Yes
The "Model-A backplane" has 1280 words of 96 bit microcode. "Model-B backplane" is 2048 words of microcode. The "Model-C" machine
will be a KL10-E with only 2048 words of microcode, but will have 4096 words cache and double pager buffer (1024 instead of 512).
The "Model-R" machine is the "FCC-KL", a KL10-E in "Jupiter" cabinets with space enough for CI (HSC/RA81) and NI (Ethernet).
A 2040 is a 2050 without cache, a 2060 is a 2050-PV with MOS memory. A 2060 with an I/O bus is identical to a 1091 painted orange.
A 1090 is a 1080 with internal channels. 1090, 2040, and 2050 come with either Model-A or Model-B backplanes.
Extended addressing and G-floating both require a Model-B backplane for the microcode (the 2020 uses extended addressing but is
limited to a single section). The 1090T was created for ARPANET, it is a blue PDP-20 (floppies instead of DECtapes).
7.02 and Rel 6 require extended addressing. The KA has no paging hardware, therefore it cannot run 7-series monitors or TOPS-20.
1080 KL10-A(PA) running TOPS-10
1088 Dual processor (1080) system
1090 KL10-B(PA) or KL10-D(PV) running TOPS-10
1090T KL10-BC(PA) running TOPS-20 (ARPANET systems only, 1090 with floppies)
1091 KL10-E(PV) with cache and DIB20 I/O bus adapter running TOPS-10
1092 KL10-E(PV) with cache and MOS memory running TOPS-10 (there is no longer any distinction between 1091 and 1092)
1099 Dual processor (1090) system
2040 KL10-C(PA) or KL10-E(PV) without cache running TOPS-20
2050 KL10-C(PA) or KL10-E(PV) with cache running TOPS-20
2060 KL10-E(PV) with MOS memory and cache running TOPS-20
Designation PV Boot Cache DTEs RH20s IO bus Used in
----------- -- ------ ----- ---- ----- ------ ----------------------
KL10-A No DECtape Yes 1 0 Yes 1080 (no internal channels, uses RH10)
KL10-B No DECtape Yes 4 8 Yes 1090 Model-A
KL10-BC No Floppy Yes 4 8 Yes 1090T (ARPANET)
KL10-C No Floppy Option 4 8 No 2040 Model-A, 2050 Model-A
KL10-D Yes DECtape Yes 4 8 Yes 1090 Model-B
KL10-E Yes Floppy Option 4 8 Option 1091, 2050 Model-B, 2060 Model-B
KL10-fast Yes Floppy Bigger 4 8 Option "Model-C"
KL10-FCC Yes Floppy Yes 4 ? CI/NI "Model-R"