POST Strategies for PowerPC and PCI

[Clyde Philips]

Assumimg Power On Self Test started out as
check out "self", i.e. CPU before doing any thing else,
and evolevd into PC style memory test/accounting,
what are the more sophistacated POST strategies
in a RISC in house board design y'all have seen.

My 2cents says cut out the noise (ints, caches, etc)
when mode selecting/setting other chips so you can
read back the programmed value and verify it (where pos.)
and then functionally verify the mode set if pos.

Given that there are stages in the bring-up situation
such as boot to serial, next to net, etc. that have to
work with POST, are there any strategies for hierachically
turning things on such that they won't have to be redone,
i.e. I can see testing the cache (I better know early
on if it's faulty), then having to disable it to do
my 2cents above then reprogramming it.

Seems like a coupla guidelines could be developed for
RISC POST. What do you know?

Thanks, Clyde