Nios soft core experience ?
Giovanni Caterina
Does anybody have (good or bad) experience with the Nios soft core from
Altera ?
TIA
Giovanni CATERINA
Raymond Gaita
where they demonstrated Nios and how to use it. We have quite a bit
of Altera experience and it looked like it would meet our needs.
After some investigation, we're looking at a different solution.
Here are the pros and cons of Nios.
Pros:
+ Relatively good performance (RISC-based CPU)
+ Fits in a variety of Altera CPLDs
+ Can create your own peripheral set
Cons:
- Didn't appear to be well supported by the compiler
- Non-standard instruction set
- Didn't always integrate well with our peripherals. There can be
lots of delay when reading or writing to registers due to routing
delays.
- Altera design tools are a memory pig!
- Requires verification of the basic CPU every time you make a logic
change.
We've looked at a few other alternatives. The one we're currently
evaluating is from a company called Triscend. Triscend's A7 family
embeds a 32-bit ARM7 CPU. The CPU is not built out of CPLD gates like
Nios, it's hard implemented in silicon. There are a few big
advantages here. It uses standard ARM tools and you don't need to
spend as much time verifying the system. The A7 has CPLD logic on
board, somewhat similar to Altera. Most of our designs are in Verilog
and we use Synplicity.
One big advantage of the Triscend approach is that the bus is built
into the FPGA. The bus timing is fairly regular, though it takes a
bit to learn how to connect to Triscend's bus in Verilog.
The A7 also comes with some peripherals already built. There are two
UARTs and two timers. There is also a DMA controller but we haven't
used it yet. Again, these don't use any CPLD logic.
The cons of Triscend are:
- A new company (Altera's been around a long time)
- The Triscend tools are a memory pig, too! By the way, you can
download an evaluation version of their software from their web site.
- Some of the documentation is a bit dicey in places.
Giovanni Caterina <gi...@idtech.be> wrote in message news:<3BB1DA8F...@idtech.be>...
Nial Stewart
>
> Cons:
> - Requires verification of the basic CPU every time you make a logic
> change.
Although with their new 'logic lock' in Quartus this might not be as
much of a restriction.
Has anyone played with logic lock yet?
Nial.
Lewin A.R.W. Edwards
> where they demonstrated Nios and how to use it. We have quite a bit
> - Didn't appear to be well supported by the compiler
> - Non-standard instruction set
Altera was supposed to be releasing an ARM7-cored version for higher-end
applications than Nios parts. I'm not clear on whether this was supposed to
be a synthesizable core or hard core with an FPGA wrapper. My UNDERSTANDING
was the latter, i.e. something quite similar to the Triscend parts, but
having read your message I now have doubts.
--
=== Lewin A.R.W. Edwards
Work: http://www.digi-frame.com/
Personal: http://www.zws.com/ and http://www.larwe.com/
Andreas Andersson
> Altera was supposed to be releasing an ARM7-cored version for higher-end
> applications than Nios parts. I'm not clear on whether this was supposed to
> be a synthesizable core or hard core with an FPGA wrapper. My UNDERSTANDING
> was the latter, i.e. something quite similar to the Triscend parts, but
> having read your message I now have doubts.
No, that's reasonably correct. Or at least, if it's not I'm mistaken too.
It's supposedly an ARM922T (whatever that is) hard core, some kind of
MIPS (4000, IIRC) based core seems to be in the works also.
/Andreas
Nial Stewart
I think these are all released now (althogh I won't be using them in
the near future so haven't been paying much notice in any
Altera bumpf I get).
for details.
Nial.
Lewin A.R.W. Edwards
>
> It's supposedly an ARM922T (whatever that is) hard core, some kind of
> MIPS (4000, IIRC) based core seems to be in the works also.
I thought they had decided to can the MIPS version.
Andreas Andersson
> > > Altera was supposed to be releasing an ARM7-cored version for higher-end
> >
> > No, that's reasonably correct. Or at least, if it's not I'm mistaken too.
> > It's supposedly an ARM922T (whatever that is) hard core, some kind of
> > MIPS (4000, IIRC) based core seems to be in the works also.
>
> I thought they had decided to can the MIPS version.
That would certainly explain why they seem to have removed all pages
about it on their website. But not a word about it being canned.
(A bit unprofessional, I must say...)
/Andreas
Lewin A.R.W. Edwards
> >
> > I thought they had decided to can the MIPS version.
>
> That would certainly explain why they seem to have removed all pages
> about it on their website. But not a word about it being canned.
> (A bit unprofessional, I must say...)
Well, I guess the logic goes like this:
1. Nobody said they wanted to buy this product.
2. Therefore nobody will know or care if we can it.
3. Let's not make a negative press release that nobody really needs to read.
Let's just drop the product quietly :)
Andreas Andersson
> > > > MIPS (4000, IIRC) based core seems to be in the works also.
> > >
> > > I thought they had decided to can the MIPS version.
> >
> > That would certainly explain why they seem to have removed all pages
> > about it on their website. But not a word about it being canned.
> > (A bit unprofessional, I must say...)
>
> Well, I guess the logic goes like this:
>
> 1. Nobody said they wanted to buy this product.
> 2. Therefore nobody will know or care if we can it.
> 3. Let's not make a negative press release that nobody really needs to read.
> Let's just drop the product quietly :)
It's a bit late to be following up to this thread, of course, but our local
Altera rep didn't (or couldn't, it's hard to tell which) say anything about
that MIPS core being cancelled. As a matter of fact, he outright said at
least one other core would follow these and hinted at what it was.
I was tired as hell at the time, though, so I can't remember what he said
and couldn't guess even if I had to :)
/Andreas