<snip>
> ,-------------------o -- D.U.T. --,
> | 10nA _ TEST |
> o-------+--+--10k 1/2W --+-- 500M --o o-, |
> + | | | 2.5 kV
> Fluke Rs +--->|----+-- 4.7k ----------+ supply
> meter | | PAD-1 v +5V |
> - | +--|<--, - 1n4148 | |
> o-------+---------+--+------------------+----o ------------'
>
> In followup posts, I'll detail 100pA leakage currents and normal
> operation at 500pA for a 1000V 1A FET, and sub-10pA leakage
> currents for a 1500-watt transient suppressor.
>
> --
> Winfield Hill hi...@rowland.org _/_/_/ _/_/_/_/
> The Rowland Institute for Science _/ _/ _/_/ _/
> Cambridge, MA USA 02142-1297 _/_/_/_/ _/ _/ _/_/_/
> _/ _/ _/ _/ _/
> http://www.artofelectronics.com/ _/ _/ _/_/ _/_/_/_/
Nice stuff Win - looking forward to the next installment.
Bill Sloman - usually Nijmegen, but now on vacation in Australia
I'm sure some of you out there are also interested in the subject,
which usually involves batteries, micro-power components and low
voltages. However, another less familiar aspect, involves
high voltages and power components.
Low-power high-voltage circuitry is commonplace, for example a 1.5kV
PMT divider chain operating at 10uA = 15mW. Micropower high-voltage
operation is a bit more unusual, for example a 500V 1uA sensor.
But nanopower operation, e.g. 2nA at 250V = 500nW, is unheard of.
Can you think of any examples?
Presented for your reading pleasure, some posts about high-voltage
nano-power design with leakage and operating data on some 1kV 1A
power MOSFETs, and 120V 10A silicon avalanche transient-suppressor
diodes.
In the next three posts, the current measurements were made with
a Fluke model 87, a sensitive but inexpensive multimeter, which has
a 4.5-digit mode and an infinite-impedance 200mV range. To protect
the meter while using over 1kV, I used a simple current-sense test
fixture, detailed below.
Rs is a switched sense resistor, typically 1.00 Meg, which allows
10pA sensitivity on the 200.00 mV meter scale. Two PAD-1 diodes
limit the voltage across the meter, with the upper diode positively
biased to keep it off. A pushbutton with a 500M resistor provides
a 10nA test current, to check for damaged diodes. (Despite some
inadvertant kV events, non have been damaged so far.)
Win:
In principle, your PMT example is a high voltage nano-power device.
Consider a Cookroft-Walton high voltage dynode biasing network such as
Hamamatsu makes for several of their products (e.g. H5773/5783 series
photosensor modules). As I understand it, the current draw would equal
the photocurrent, say a picoamp for low light levels, for a total power
of 1000 V x 1 pA = 1nW. I doubt Hamamatsu did the optimization to
minimize the power loss from diode leakage, capacitor leakage, etc. in
the voltage multiplier chain.
I'm sure that from the phrase "In principle" you could tell I'm a
scientist and not an engineer.
Bret Cannon
>
> By operation, I'm thinking of operating active semiconductor-device
> circuits, i.e, amplifiers, etc, as opposed to say back-biased diodes.
>
> > Presented for your reading pleasure, some posts about high-voltage
> > nano-power design with leakage and operating data on some 1kV 1A
> > power MOSFETs, and 120V 10A silicon avalanche transient-suppressor
> > diodes. [ big snip ]
> >
> > In followup posts, I'll detail 100pA leakage currents and normal
> > operation at 500pA for a 1000V 1A FET ...
>
> Just to set the stage. This "ordinary" FET is capable of operation at
> 3A at 1kV, which is 3000 watts (even if for only 5us).
>
> By contrast, when operating at 500pA and 1kV, as detailed above, that's
> 500nW. In addition, this part is happy at 150pA and 20V = 3nW. And at
> 100pA and 10mV = 1pW. Or less. Consider that the dynamic range we're
> discussing here is 3kW / 1pW = 3 x 10^15.
>
> This gives one pause.
I just thought of a better example of a high voltage nano power device:
vacuum photodiodes. Run them at several hundred volts for fast time
response and dark currents must be below 1 pA.
Bret Cannon
Yes, I'm sure the entire C-W network takes much more power than 1nW (!!)
even with no light input to the PMT. Maybe someone can chime in...
I was thinking of the operation of active circuits, in my comment. So
most simple low-power sensor scenarios wouldn't count, for example a photo
diode operating in photovoltaic mode without any load resistor, is "zero"
power. So what....
However, sure a full PMT is an active device, and so's your vacuum
photodiode. Thanks. We'll see if any other examples are forthcoming.
--
Winfield Hill hi...@rowland.org
Rowland Institute for Science
Cambridge, MA 02142
We'll start with Motorola's smallest 1kV power MOSFET, the MTP1N100E.
The 1N100 is a 1A 1000V FET with R_DS(on) = 6.7 ohms (typ) and comes
in a 75W TO-220 package. It's not a small transistor, and has an
input capacitance Ciss = 587pF. But it's the smallest 1kV FET I've
been able to find, does anyone know of one smaller?
The 1N100 is specified at 100nA maximum gate-to-body leakage with
Vgs = 20V, and Vds = 0. This isn't too impressive, after all, it's
our expectation that the gate be a perfect insulator. Well, maybe
it's really much better.
What about the all-important drain current leakage? Obviously, we
can't operate the 1N100 transistor at a current below its leakage!
The current for Vgs = 0V is specified at 10uA max with Vds = 1000V,
at 25C. Hmmmph! That's 10,000nA, a veritable flood of electrons!
However, it's well known that most manufacturers use a large safety
margin on their tougher hard-to-meet or hard-to-measure specifications,
and hopefully the 1N100 is no exception.
We start by measuring some parts at 500V, using a Fluke 87 with the
safety fixture described in the last post. The first part is 1.23nA.
Yes! Very good. Then we get 1.30, 1.64, 1.00 and 1.33uA. Excellent!
OK, continuing, 160nA. Awkk!!
Examining the offending part, I see it's one of the older ones left
from the years when Motorola forgot how to make these 1kV transistors,
and actually discontinued the product for a while, telling us to buy
1N90 parts instead. But even the 900V parts were very leaky, often
dramatically exceeding Motorola's 10uA spec, by say a factor of 100x!
Turning down the voltage to 100V, we still get 80nA; forget this part!
Continuing, we get 1.79 and 1.23nA. OK, enough, we get the idea. But
what about leakage vs drain voltage? Let's examine the 1.00 and 1.23nA
parts more carefully. We'll measure the drain current, which is the
sum of the gate and source leakages:
difference
Vds -- "leakage" nA -- "operating" Id(2V) -
volts #16 #11 Vgs = 0 Vgs = 2V Id(0V)
---- ---- ----------- ------- ------
0 0 0 0
10 0.07 2.12 2.05
25 0.13 0.10 2.14 2.01
50 0.16
100 0.26 0.33 0.27 2.17 1.84
200 0.50 0.57 2.21 1.64
300 0.75 0.80 ^ 2.24 1.44
400 1.03 1.02 | 2.28 1.26
500 1.30 1.23 2.33 1.10
600 1.53 1.52 ^ 2.39 0.87
700 1.70 1.70 2.48 0.78
800 1.90 1.91 2.63 0.72
900 TRIP 2.17 ^ 2.92 0.75
1000 - 2.53 | 3.51 0.98
1100 3.28 -' 4.77 1.49
Although FET #16 showed no sign of increasing leakage at 900V, it
triggered the power supply's 10mA shutoff TRIP point. Re-arming
the supply and approaching 1kV caused a repeat TRIP. On the other
hand, most other FETs show no such TRIP activity, but instead simply
an increasing current, say to 4nA at 1150V and 100uA at 1170V and etc.
The Vgs = 0V curves for FET #11 show an increasing leakage current at
1.0 to 1.1kV, and immediately thereafter the current at low voltages
was re-measured, showing a 30 to 60pA reduction. This is an effect
I've seen before. With a dissipation of only 0.0036 mW at 1100V,
this isn't likely to be a thermal effect.
The next column shows the drain current with Vgs = 2.0 volts. At 2V
the FET is slightly turned on, at about 2.1nA. The current increases
with drain voltage, and is likely made up of tranconductance and
leakage components. Is the current at Vgs = 0V simply the leakage?
The last column shows the difference between the FET's "on" and "off"
drain currents, or Id (Vgs = 2V) minus Id (Vgs = 0V), which should
remove the influence of any Vgs = 0 "leakage" current. However, the
decreasing difference, from 2.0nA at 25V down to 0.7nA at 800V, shows
this is not the case at all. Very interesting. Perhaps the Vgs = 0V
drain current isn't leakage after all?
OK, we see that linear operation of these 75W FETs at currents as low
as 2nA is a real possibility, and several interesting questions are
raised. Well, that's it for this installment, folks. Stay tuned,
there's much more to come.
Bill, enjoy your aussie vacation!
... Writing about the nanopower and micropower linear operation of
power MOSFETs, continued ...
> We'll start with Motorola's smallest 1kV power MOSFET, the MTP1N100E.
> The 1N100 is a 1A 1000V FET with R_DS(on) = 6.7 ohms (typ) and comes
> in a 75W TO-220 package. It's not a small transistor, and has an
> input capacitance Ciss = 587pF. But it's the smallest 1kV FET I've
> been able to find, does anyone know of one smaller?
>
[ snip "leakage" measurements and discussion ]
>
> OK, we see that linear operation of these 75W FETs at currents as low
> as 2nA is a real possibility, and several interesting questions are
> raised. Well, that's it for this installment, folks. Stay tuned...
Normally the linear operation of FETs is described by a "square law,"
wherein Id is proportional to Vgs^2 above some threshold voltage.
But at low currents, in what's called the sub-threshold region,
a FET's operation is exponential, not unlike a bipolar transistor.
The low-current transfer characteristics of the 1N100 power FET are
shown in the graph below. The drain current equation is similar to
the Ebers-Moll equation, but with a divider, n, in the exponent,
which scales Vgs by n Vt = 108 mV for this part. My measurements
show that the "leakage" current is revealed to be not an additional
current, but rather a lower limit for the equation. This minimum
drain current is a function of drain voltage, as the graph shows.
Id (log scale) /
/
100 - / Motorola MTP 1N100 E
/
/
10 - / \
500V / Vgs / n Vt
nA ___________,,,--' Id = Is e
1 - /
25V / where
_______,,,---' Is = 2.52E-16 A
0.1 - / Vt = 25.3 mV
--'' n = 4.27
i i i i i
0 1.0 2.0 V
Vgs
On the graph, the minimum current for Vds = 500V is 1.23 nA. This
could be compared to a 500V/1.23nA = 406 G-ohm resistor. Although
a 406G resistor actually describes the Vgs = 0 current vs drain
voltage quite well (below 1kV), there is no easy place to put such
a resistor in the usual simple FET models. For example, operation
at 1.5nA is described simply by the equation, without room for any
additional 1.2nA "leakage" current or 406G resistance.
From the transfer-function equation, we see that transconductance,
g_m, is proportional to drain current, just like a BJT, but is lower
by the factor n, g_m = Id / n Vt, where Vt = kT/q = 25.3mV at 20C.
For example, at 1.0nA the transconductance is 1.0nA/108mV = 9.22 nS
(nano-Siemens, or nano-mhos for you old-timers).
Yep, that's pretty low! Let's see what we cna do with it.
(A) 2nA amplifier. Let's consider an ordinary common-source amplifier
stage, using a 1000V supply, operating at 2.0nA with the FET drain
biased at 500V. We see the drain load resistor must be 500V/2nA
= 250G ohms. At 2nA the transconductance is 18.4 nS, so our voltage
gain G = g_m R_L = 4600. Not so bad! Hmmm, what about the amplifier
bandwidth? With a total output capacitance of 20pF, the -3dB point
will be at 0.03Hz. Hah! Got some time on your hands?
(B) High-voltage regulator. This will prove to be a more sensible
application than the amplifier. Let's use two of our 1N100 75-watt
power MOSFETs make a micro-power 250V, 0 to 1A linear voltage
regulator.
,------+----- Vin = 750 to 1000 V
| |
500 G |
| D Q1
+--- G
| S ---+----+----- Vout = +250V
| | | I = 0 to 1000mA
| 100 G |
D R2 | 10nF R2
G --------+ 400V Vo = Vgs(2) ( 1 + ---- )
S adj | | R1
| Q2 660 M |
| | R1 | quiescent power consumption
--+-- GND ----+----+--- 0.0026 mW at 750V.
This regulator can operate with any load from 0nA to 1Amp!! At 0nA
load it has an output of 250.0V and drops slightly to about 249.9V at
1A load. This is because Vgs(1) rises from 1.6V to 4.8V, decreasing
the current through Q2 by 0.64%. Operating at 1nA (for Vin = 750V),
the transconductance of Q2 is 9.22 nS, so Vgs for Q22 changes by
-0.64% 1nA / 9.22nS = -0.69mV. The output change is magnified by the
ratio 1 + R2/R1, or -100 mV, or just 0.04%, if all my math is correct.
We see that Q2 acts as the voltage reference, 1.641V at Id = 1nA, true
for Vin = 750V. If Vin is increased to 1kV, the current in Q2 rises
to 1.5nA and Vgs = 1.692 or 51mV higher, and the output increases by
the ratio 1 + R2/R1, or 7.7V to 257V. This is an input regulation of
3%, which can be improved by a more complicated circuit. While you're
thinking about that, you can also add a simple current limit.
OK, not a bad circuit. Hmmm. About R1. Is that 620M plus a 100 meg
trimpot ?! $%#@ Does Radio Shack carries those? ;-)
[ snip "leakage" measurements and discussion ]
[ snip active-region data and discussion ]
> (A) 2nA amplifier. Let's consider an ordinary common-source amplifier
> stage, using a 1000V supply, operating at 2.0nA with the FET drain
> biased at 500V. We see the drain load resistor must be 500V/2nA
> = 250G ohms. At 2nA the transconductance is 18.4 nS, so our voltage
> gain G = g_m R_L = 4600. Not so bad! Hmmm, what about the amplifier
> bandwidth? With a total output capacitance of 20pF, the -3dB point
> will be at 0.03Hz. Hah! Got some time on your hands?
Power consumption. The amplifier above is operating at 2nA with a
1000V supply voltage, so it's power consumption is 2 microwatts.
If designed for use with say a 250V supply voltage, still drawing
2nA, it would consume 500 nanowatts.
Note that if used at 250V, the 1N100 FET's low-current leakage limit
would be lower and the amplifier could be run at say 200nW. However,
other medium-voltage smaller-geometry FETs would be a better choice,
and we'd happily discover even lower leakage currents, I'd guess
allowing the design of a 50nW or even lower amplifier.
> (B) High-voltage regulator. This will prove to be a more sensible
> application than the amplifier. Let's use two of our 1N100 75-watt
> power MOSFETs make a micro-power 250V, 0 to 1A linear voltage
> regulator.
>
>
> ,------+----- Vin = 750 to 1000 V
> | |
> 500 G |
> | D Q1
> +--- G
> | S ---+----+----- Vout = +250V
> | | | I = 0 to 1000mA
> | 100 G |
> D R2 | 10nF R2
> G --------+ 400V Vo = Vgs(2) ( 1 + ---- )
> S adj | | R1
> | Q2 660 M |
> | | R1 | quiescent power consumption
> --+-- GND ----+----+--- 0.0026 mW at 750V.
[ snip design details ]
Power consumption. The regulator above is operating at 3.5nA total
quiescent supply current. If designed for use with say a 250V supply
voltage, and 100V output, still drawing 3.5nA, it would consume 875
nanowatts. However, as noted above, the 1N100 FET's leakage limit
would be lower and the power supply could be run at say 0.8nA total
current, or 200nW. And as before, other FETs would be a better
choice, etc. etc. and 50nW or even lower power consumptions would be
possible.
Clearly very low-power analog circuits can be made using the right
components and circuit techniques. If required, linear-circuits can
compete with the very low current drains enjoyed by CMOS logic, etc.
But my interest here was with the possibilities along this pathway at
high voltages, with power components. As we saw above, the 75W 1kV
FET was very happy to operate in circuits consuming 2uW, and with care
at moderately lower voltages can break the nano-watt barrier.
Just to belabor the point, the regulator above can operate at 1A, for
a short period of time, delivering 250W of power. The ratio of power
output to quiescent power is 250W / 2.6uW = 10^8.
I received email suggesting Supertex and their line of high-voltage
power MOSFETs, which they offer in TO-92 through TO-220 packages. Yes,
we shouldn't ignore the extensive line they have, with many different
die sizes, both P and N types, and even high-voltage depletion-mode MOS
FETs, which can be very useful in micro and nano-power circuitry. But,
as far as I can tell, their FET product line doesn't go above 600V.
The range of 1kV designs I've been showing here stem from a project
I'm working on now, and although I only needed "micropower" capability,
measurements on various 1kV components to qualify them for the design
revealed the possibility of nano-power operation, and I couldn't resist!
But it's also nice to contemplate that if you set your limit at 600V
rather than 1000V, much better parts suited for nano-power design
are available, and much more variety as well.
I hope you don't have a pilot's licence Chuck :)
Walter
Disclaimer: My employer is not responsible for this stuff.
Would this be a cryogenic-type project by any chance?
Reminds me of the Grace L. Furguson Airline and Storm Door Company skit
by Bob Newhart. You remember, the one where the pilot asks the passengers
if anyone has been to Hawaii, and can point out where to land, "Is it the
big one over there, sort of Kidney shaped?"
No, Walter, it's a precision focussing-electrode circuit for a positron
generator, all operating at 20kV above the control voltages, "phantom
powered" from the 20kV electrode-biasing voltage source, with a -1kV
tap on a resistive divider. The whole positron-source generator is at
2000kV = 2MV above ground potential, and that leads to another story.
I'm told that occaisionally there are these gigantic sparks ;-)
and that most electronics is therefore susceptible to static failure.
For that reason I'll be relying the sub-nanosecond response of silicon
transient voltage suppressors. Question: are these devices also very
low leakage - i.e. micropower or nanopower compatible?
Answer, for selected parts, Yes!
Measuring five units of 1N6297A, also known as 1.5KE120A, a standard
1500-watt 120V (at 1mA) 9.1A (at 165V) silicon transient voltage
suppressor, I get the following leakage currents at 100V:
0.22, 0.39, 0.00, 0.09, 0.06 nA.
Aha! What's that 0.00nA part? Indeed this part is under 10pA up to
over 100V, then 30pA at 110V, 70pA at 115V. Then its current starts
rising rapidly. Up to 5mA at 122V, 20mA at 133V, 40mA at 139V and etc.
The spec claims it won't be over 165V at 9.1 amps, and can take this
level (1500W) for a 1ms surge.
A group of 8 to 10 of these in series can act as a basic building block
for a circuit to provide protection at the kV level, without taking any
current!
Walter Gray wrote:
> In article <346CF1A3...@CatenaryScientific.com>, Chuck Parsons <ch...@CatenaryScientific.com> writes:
> :
> []
> : Anyway low dark current photo tubes can be very low leakage devices, for the
> :best performance you cool them. If you were building a neutrino detector like
> :the one off Hawaii under the polar ice cap. ( Cold and dark ) I think 500 nW
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>
> I hope you don't have a pilot's licence Chuck :)
Ouch! O.K. I deserved that. Anyway if anyone is not clear on it, I meant
to say, "similar to the one off Hawaii, _but_ located under the polar ice cap".
Actually, I don't know that the neutrino detector off Hawaii has actually
been built and taken data, but I remember reading about the design 5 or 6
years ago in Physics Today.
Chuck
I remember poking my finger at the 1G resistor in a charge amp and
the tech screamed at me "DON'T TOUCH!!!". How are you going to keep
that lot clean and cool? I would be interested to see what happens
to the statistics with a bigger sample. Looks like you will have to
buy hundreds to get your selection. Have you tried cleaning them
before measurement?
No problem, they'll equalize themselves. That is, they'll end
up dividing the voltage so each one is at the same leakage current.
The fact that one has more than another isn't important, since the
power dissipation is ZIP anyway!
And remember, these parts eat HIGH VOLTAGE for breakfast, and come
back hungry for more.
> My question comes from a little job I am planning to do soon, to replace
> EHT recs in an old scope with some 1N4007s in series. It seems to me
> that the one with the lowest leakage will protect the others which
> will act as 'zeners'. I can't see any need for a resistor chain like
> it says in many books. Any thoughts?
I agree. Many commercial designs have series rectifier diodes without
any equalizing components. I'd want to think about dynamic matching
issues, but so far, it's OK by me.
Incidentally, Walter, how come all my email to you at
wag...@taz.dra.hmg.gb bounces?
Damm. I didn't think of that. Of course, when handling my glass
resistors, I always do so by the leads, wash my hands first, use
solvents as necessary, etc. I did think about the test fixtures
and leads, etc and check their insulation resistance, etc., by
verifying zero reading without the part in place. But harrummph!
when handling ordinary FET power transistors, etc, why I just pick
them up with my greasy fingers. Gross!
Now let's see. 1000V and 10pA means a measured 100,000 G-ohms.
Yes, very possibly my handling of the parts was responsible for
some of the leakage of the sub-100T-ohm parts.
Don't think I've heard that one. It reminded me of "Wrong Way" Corrigan.
BTW if your transient absorbers really have 10pA leakage how
are you going to equalise potentials down the chain?
My question comes from a little job I am planning to do soon, to replace
EHT recs in an old scope with some 1N4007s in series. It seems to me
that the one with the lowest leakage will protect the others which
will act as 'zeners'. I can't see any need for a resistor chain like
it says in many books. Any thoughts?
Walter
After I finished it suddenly occurred to me that a cheap 1000V spark
gap would do the same thing. If your overvoltage is due to sparks it
follows a spark gap should be fast enough (doesn't it?). Spark gaps eat
high current for breakfast, dinner, tea, supper and late-night snacks.
:> My question comes from a little job I am planning to do soon, to replace
:> EHT recs in an old scope with some 1N4007s in series. It seems to me
:> that the one with the lowest leakage will protect the others which
:> will act as 'zeners'. I can't see any need for a resistor chain like
:> it says in many books. Any thoughts?
:
: I agree. Many commercial designs have series rectifier diodes without
: any equalizing components. I'd want to think about dynamic matching
: issues, but so far, it's OK by me.
The shunt capacitors looked just as pointless as the shunt resistors. If
one diode is a bit low on self capacitance it might start avalanching on
a reverse transient but the rest of the diodes should protect it. Anyway,
I'm happy enough with the idea to try it out.
:
: Incidentally, Walter, how come all my email to you at
: wag...@taz.dra.hmg.gb bounces?
My ***new*** address is wagray*dera.gov.uk (the * for obvious reasons)
but wagray*dra.hmg.gb still works. I love that "hmg" domain, it's really
unusual and distinctive, and there will be no new "hmg.gb" addresses :)
I don't know why "taz" bounces, I'll have to ask our systems people.
Douglas Dwyer Frequency Precision Ltd. I design/advise on Xtal osc TCXO OCXO
SAWc etc Reply via demon or 10150...@compuserve.com phone/fax:
+44(0)1837810590 http://ourworld.compuserve.com/homepages/Frequency_Precision/
Well, that's an interesting story. Yes, efficient HV sensors are not
so rare at all. But that battery is interesting. Are you saying this
battery was stil good after 20 years? Was the device "on" all that
time (but just in darkness?)
>... But that battery is interesting. Are you saying this
> battery was stil good after 20 years? Was the device "on" all that
> time (but just in darkness?)
>
>--
>Winfield Hill
There is an electrical device displayed at the entrance to (I think)
the Cavendish lab that has been working since the turn of
the century. Someone suggested when I mentioned this unusual factoid,
that it was/is probably a Zamboni Pile.
Brian Whatcott <in...@intellisys.net> Altus OK
: Douglas Dwyer at ddw...@ddwyer.demon.co.uk says...
: >
: > The ability to do useful things with HV @ Lo current existed 50 years
: > ago.
: >
: > As a child I was facinated by the "Zamboni Pile" ( a 5?kV battery
: > not a personal affliction) I removed from a WW2 image intensifier.
: > If such sources were available now, there could be a range of new
: > products that could employ their long life (was >20y old when I
: > opened it up) high voltage characteristics.
:
: Well, that's an interesting story. Yes, efficient HV sensors are not
: so rare at all. But that battery is interesting. Are you saying this
: battery was stil good after 20 years? Was the device "on" all that
: time (but just in darkness?)
the long and fascinating story of the Zamboni Pile can be found at
http://albinoni.brera.unimi.it/Atti-Como-96/tinazzi.html
the title is "Perpetual Electromotive of Guiseppe Zamboni"
although most of the article is in english, many quotes
are in Italian, so get out your dictionario...
here is an excerpt from http://www.eskimo.com/~billb/emotor/duluc.txt
> The DuLuc Dry Pile (c)1996 William J. Beaty
>
> The Duluc Dry Pile (also called the Zamboni Pile) was an "electrostatic
> battery" permanent power supply used in the early 1800s and constructed
> from silver foil, zinc foil, and paper. Foil disks of 2cm dia. were
> stacked up several thousand thick and then either compressed in a glass
> tube with endcaps and a screw assembly, or stacked between three glass
> rods with wooden endplates. Of course this is simply a Voltaic Pile, a
> multi-cell electrochemical battery, albiet one with output potential in
> the range of kilovolts. Each cell used nearly-dry paper as electrolyte,
> with zinc foil for one electrode and silver foil as the other.
>
> [...]
>
> A book on the history of Perpetual Motion showed photos of "genuine"
> perpetual motion devices based on the Dry Pile. DuLuc's version was
> composed of two series-connected Dry Piles operating a pendulum
> electrostatic motor of the "Franklin's Bell" type. The drypile stacks
> were of the 3-glass-rod variety, and had been insulated by dipping in
> liquid sulfur (no plastics in 1806!) The device in the book is owned by
> Dr. A.J. Croft of Oxford's Clarendon Lab. At the time of publication of
> the book, this device had been tinkling away for over a century, and the
> owner of the device mentioned that the clapper-bead was starting to take
> on a distinct hourglass shape, and may need to be replaced in the next few
> centuries! A second device by Zamboni was a rotating "Franklin's wheel"
> electrostatic motor powered by two dry piles.
>
> Dry piles found commercial use as the power supplies of electrostatic
> voltmeters (quadrant electrometers) and in WWII infrared converter scopes.
r
Readers of this thread will have noticed that nearly every tested part
described in this thread has had nanoampere-scale leakage currents,
even though they are power components running at high voltages. Is
this a general rule, and all HV components are in fact really low
leakage, far below official manufacturer's specs?
In this article, we'll explore another nanopower micropower application,
a low-power switched high-voltage power supply, and discover that most
of the high-voltage diodes considered simply didn't make the grade!
In this design, a low supply voltage is kicked up to 700 to 1000V by a
flyback-inductor or flyback-transformer supply. If the former, the
switching transistor must work to 1kV, and the 1N100 FETs we examined
earlier would work fine. But an extra winding on the inductor creates
the latter flyback-transformer mode and allows us to get our 1kV output
with ordinary low-voltage power FETs.
For example, consider a 6 to 9V supply and let's imagine the converter
pulses once every 10 minutes and transfers 12mJ to the 1kV output
capacitor. That's only 20 microwatts.
The output-stage of the 1kV DC-DC converter circuit looks something
like this:
HV diode
gnd ---OOOOOO--->|--+----+--- 1kV out
====== | | 10nA
+12 ---OO--, 0.4uF |
| | 250G
FET gnd |
switch |
feedback
In order to operate at under 20uW, we see the current from our 1kV
storage capacitor must be under 20nA (20nA * 1kV = 20uW). Our 0.4uF
output capacitor will droop 10V between each 10mJ charge pulse.
Working the current budget, we assign only 10nA to the load, 4nA to
the feedback resistor, 4nA to the capacitor (a relaxed 100,000
megohm-microfarads), and we see the HV diode is limited to just
2nA leakage.
Given all the sub-nA leakages we've been seeing, this spec doesn't look
too hard. However, first measuring some 1N5408 and 1N5399 diode showed
that the 2nA spec was exceeded at even at relaxed 50V, let alone at 1kV.
Then a 1100V fast-recovery diode, the MUR1100 was tried, and failed
even more miserably.
DV 1N5408 1N5399 MUR1100 MUR890
volts ------ ------ ------- ------
50 4.8nA nA 13.5nA 0.3nA
100 6.4 7.0 16.6 0.5
200 8.2 7.9 0.6
400 10.8 9.4 1.2
600 12.9 10.6 33 1.3
800 16.5 11.7 1.6
1000 25.5 + 13.0 74 2.0
1200 50 + 14.2 138 6.7
1400 137 15.9 +++ +++
1600 982 18.5
1800 +++ 24.3
2000 42.6
At this point, using the intrinsic reverse diode in the 1N100 power
FET was considered. Parts with as low as under 2.5nA leakage at 1kV
have been seen.
Finally however, a 900V fast-recovery diode was tried, the MUR890.
See the last column above. Yes! Only 2nA at 1kV.
Here ends today's paper-design session. Time for supper.
20uW of average power consumption isn't bad for a 1kV generator.
That's only 2.2uA average from a 9V battery, and a much lower power
consumption than other HV power supplies I've examined.
> The output-stage of the 1kV DC-DC converter circuit looks something
> like this:
> HV diode
> gnd ---OOOOOO--->|--+----+--- 1kV out
> ====== | | 10nA
> +12 ---OO--, 0.4uF |
> | | 250G
> FET gnd |
> switch |
> feedback
>
> In order to operate at under 20uW, we see the current from our 1kV
> storage capacitor must be under 20nA (20nA * 1kV = 20uW). Our 0.4uF
> output capacitor will droop 10V between each 10mJ charge pulse.
> Working the current budget, we assign only 10nA to the load, 4nA to
> the feedback resistor, 4nA to the capacitor (a relaxed 100,000
> megohm-microfarads), and we see the HV diode is limited to just
> 2nA leakage.
Let's consider operating this circuit with even less power. Using a
selected low-leakage part, we can assign only 1nA to the capacitor.
Keeping 2nA for the diode's leakage, we have 3nA so far and see that
the lion's share of the current (4nA/7nA = 57%) is going to the 250G
sense resistor.
Should we consider using a 1000G = 1T-ohm resistor instead? Well,
these high-value resistors are a pain, not to mention the low-current
sensing circuits required. Instead, let's consider a nice low value
feedback resistor like say 100M, and switching it on only during
short controller operation intervals. If we use a MTP1N100E power
MOSFET as a switch, we'll live with it's 2nA of leakage at 1kV.
OK, that's it, we have the 1kV current drain down to 5nA, plus the
load current. The quiescent power loss of 5 microwatts is half our
original circuit (about 600nA from a 9V battery) and seems to be
about as well as can be achieved with the power components in use
here. The 1N100 FET and MUR890 diode are both large TO-220 parts.
All the parts I've considered for this "nano-power" thread have
simply been "ordinary" power components in our electronics shop
inventory. Does anyone reading this know of better-suited small
geometry 1kV components that might have lower leakages and thereby
allow true nano-power operation?
Winfield Hill wrote:
I've always been disapointed how hard it is to find low leakage diodes.
Hammatsu 7mm^2 pin diode detectors routinely have < 200pA leakage
at Room temperature 30v. So I say to myself what about a 0.01mm^2
device Its 100um by 100um plenty big enough to bond to and should be less
than 0.5pA.
I checked what I would consider a more traditional part for your circuit
a Fuji ESJA52-10/5KV unit cost $1.03. It is 1amp diode sized though
a little longer. Checking 10 in a very uncomfortable room at 30C I found
surpisingly little variation perhaps +-10%.
Voltage Leakage (nA)
0 .1nA (included to show the
circuits accuracy )
500 0.8nA
1000 1.0nA
1500 1.2nA
2000 1.4nA
I used clip leads through a 20meg resistor to deliver the voltage. At
first
I got very erratic results until I stopped touching the "insulated" clip
leads.
So not much improvement in leakage, but much better voltage capability
and maybe cheaper, certainly smaller. I'm sure there would be a measurable
improvement at 20C
Happy Thanksgiving,
Chuck
At least you weren't touching the 2kV wires - just for the fun of it!
;-)
> So not much improvement in leakage, but much better voltage capability
> and maybe cheaper, certainly smaller. I'm sure there would be a
> measurable improvement at 20C.
>
> Happy Thanksgiving,
> Chuck
Thanks, Chuck, that was an interesting piece of data. Nice to see some
other interest in this exotic topic, and even slaving for measurements
over a hot bench! Good work! I'll check out those FUJI parts.
Ah, yes, that's a good question. Of course, this is all just a paper
design game, but let's explore that question. I envisioned a fairly
high-power 1kV charging operation, with say 3 to 12mJ transferred
every time the converter is activated, say every 2 to 10 minutes.
This should allow an efficient DC-DC converter design, say 80 to 90%,
because capacitance losses in the transformer's windings and the
switching transistor, etc., should be a small fraction of the energy.
For example, 1/2 CV^2 for 1kV and 40pF is only 0.02mJ, only 2% of the
energy stored in a 8mH inductor at 0.5A. Thinking out-loud here, if
the 8mH primary is allowed to flyback to 350V, then a 1:3 turns ratio
will mean the secondary's inductance is 72mH, which shouldn't be too
hard to wind retaining the postulated 40pF capacitance.
Hah! No, this thread has simply been exploring nano-power design and
the bottom end of micropower design for various 1kV circuits. Mostly
for the fun of it, although a serious design project at work has been
behind the low-power measurements I've been taking, and are feeding
this thread. In the work project, a positron electrode focussing
system operating at 20kV, my power budget is several milliwatts.
As far as micropower circuits are concerned, a 5uW power consumption
works out to 0.22 Whr in 5 years, or 75mAhr from a 3V watch battery.
If made from silver-oxide buttons, two fairly large cells would be
required, with nothing left for other circuits or safety margins,
showing the desirability of even lower power consumption.
> Let's consider operating this circuit with even less power. Using
> a
> selected low-leakage part, we can assign only 1nA to the capacitor.
>
> Keeping 2nA for the diode's leakage, we have 3nA so far and see
> that
> the lion's share of the current (4nA/7nA = 57%) is going to the
> 250G
> sense resistor.
>
> Should we consider using a 1000G = 1T-ohm resistor instead? Well,
> these high-value resistors are a pain, not to mention the
> low-current
> sensing circuits required. Instead, let's consider a nice low
> value
> feedback resistor like say 100M, and switching it on only during
> short controller operation intervals. If we use a MTP1N100E power
> MOSFET as a switch, we'll live with it's 2nA of leakage at 1kV.
>
> OK, that's it, we have the 1kV current drain down to 5nA, plus the
> load current. The quiescent power loss of 5 microwatts is half our
>
> original circuit (about 600nA from a 9V battery) and seems to be
> about as well as can be achieved with the power components in use
> here. The 1N100 FET and MUR890 diode are both large TO-220 parts.
>
> All the parts I've considered for this "nano-power" thread have
> simply been "ordinary" power components in our electronics shop
> inventory. Does anyone reading this know of better-suited small
> geometry 1kV components that might have lower leakages and thereby
> allow true nano-power operation?
>
Maybe I'm missing something, but it seems to me that there is some
drive circuitry which has not yet been considered which will increase
the power budget.
In addition (or perhaps subtraction) it also seems to me that if the
load impedance is clearly defined and stable, the need for the
feedback resistor and its attendand circuitry could be eliminated,
with an eye toward minimizing the total power consumption of the
system.
Considering that the required capacitance of the output filter cap can
be defined in terms of the allowable output voltage droop as a
function of both time and load current by C= Idt/dV,
where C is the required capacitance,
I is the sum of the average current drawn by the load and
the leakage currents imposed
by the diode, the output filter cap, the PCB or
whatever form of assembly is used,
dt is the time between successive charge pulses into the
cap, and
dV is the allowable voltage droop across the load,
it should become apparent that for any load current required a refresh
interval can be specified which will keep the cap charged within the
allowable droop window, totally negating the need for the output
voltage sensing circuitry and its attendant power requirements.
Moreover, if the load impedance is known to vary and its variance is
known, a suitable capacitor can still be chosen since the refresh
interval can be tailored to to keep the cap charged "to the max" for
the required total current drain with respect to time. This would, I
believe, also serve to negate the need for the output voltage sensing
circuitry and its attendant power requirements.
There still remains, however, if an extraordinary level of efficiency
is desired, an examination of the means used to convert primary power
to the levels needed for the application.
John Fields
In this thread we've dscussed several nanopower and micropower 1kV
circuits, using power FETs.
Here's an unusual micropower DC-DC converter; it works with a 1000 VDC
input! Once again, I'm seeking the smallest 1kV MOSFET available, and
settle on the Motorola 1N100, the TO-220 case power part detailed above.
You may remember that typical selected FETs have only 2nA leakage at 1kV
(and can operate to 1200V), so we know the converter's quiescent power
consumption will be at least 2uW at 1kV.
Here I'll spell out some of the design details for a converter that
generates 15V and 5V outputs, has an average input-operating current
of about 10nA with no load, an efficiency of 70 to 75% for loads above
50uW, and a power-output capability of about 3 watts, running at 25kHz.
I've chosen a flyback-transformer configuration, with a turns ratio to
create a +100V primary flyback (i.e. the voltage on the FET will be
1.1kV plus the snubbed leakage-inductance spike).
+ 1000V 200V piv
IN ---+-----+----------, ,------>|-----+---- 15V
| | O || O 36t 150uF
| | O || O |
| snubber O || '- gnd gnd
| | O ||
| | O || ,----->|---+---+--- 5V
0.1uF | 225t O || O 12t 470uF |
1.5 kV | O || '----------+------- gnd
| '------+---' core |
| | A_L = 1000 | 5V current drain
| D nH/N^2 | must be more than
| -- G | 3x the 15V current
| S MTP feedback
1kV | | 1N100E
rtn --+-- 6.8 -----'
We'll start the design by considering the energy lost in a single cycle
of the converter. This will allow us to scale the parameters so the
conveyed energy is much greater than the wasted energy. Our problem
here is the total capacitance of the transformer, power FET and snubber
diode, which is charged from the 1kV power source and discharged into
ground, once each cycle. Interested readers will want to follow along
with a 1N100 data sheet (in the Motorola TMOS book, DL135/D rev 6 page
4-678, or http://www.mot-sps.com/books/dl135/pdf/mtp1n100erev2x.pdf).
It's not easy to determine the charge in the FET's output capacitance
from the 1N100 data sheet, because of its very nonlinear nature. For
example, Coss = 18pF at 400V, but 60pF at 25V and climbs to 600pF when
saturated at 1V. If we assumed a constant 40pF, the wasted charge would
be q=CV = 40nC for each 1kV excursion (or 12.8nC for 320V).
Motorola does give a detailed log-log plot for Crss (the gate-drain
capacitance), and Coss (the output drain-source capacitance, plus Crss).
From this (fig 7b) we see Coss vs Vds tracks and is always about 6*Crss.
They also give detailed charge data for the gate (fig 8), which careful
examination shows about 2.3nC for a 400V to 80V Vds excursion (during
which Vgs remains fixed at 5.5V). We get 6 * 2.3 = 13.8nC, or close to
our 12.8nC estimate above for 40pF. So, can we also believe our 40nC
estimate for the full 1000V swing (i.e. simply multiply the charge by
1000/320)? Examining the gate charge graph for the region Vds = 400V
down to 0V (afterwhich the gate drive causes the gate voltage to begin
rising again), we see the gate capacitance has consumed about 7.5nC,
implying 6* 7.5 = 45nC for the drain-to-source. Adding 18pF * 600V =
11nC to account for the 1kV to 400V portion, we get 56nC total.
This is more realistic than our 40nC guess.
Now perhaps we can calculate the dynamic switching loss. We'll add 7%
for the snubber diode (a MUR1100E is 3.5pF at 25V), or 4nC, and we'll
budget 25pF for the windings and transformed secondary capacitances,
adding 25nC. We get 56 + 4 + 25 = 85nC.
Now we can calculate an energy loss of 1/2 CV^2 = 1/2 qV = 43 uJ per
cycle. Let's say we want 75% maximum flyback-stage efficiency. With
a little manipulation we write Eo = Eloss (n/1-n) where n=0.75, the
efficiency, and get about Eo = 125uJ per cycle. It's interesting to
note that operating with a 5uW load, only one cycle is needed every
125/5 = 25 sec. At a more reasonable 5mW load, the converter runs at
40 cycles/sec.
The high per-cycle energy also means the output storage capacitor will
be larger than usual, say 470uF for the 5V supply, and a selected
low-leakage part will be appropriate. A small Rubycon 160V electrolytic
I have in the shop measured 0.2uA leakage at 5V (this is 5/0.2 = 25M
leakage resistance, or 12,500 M-ohm-uF, much better than official specs).
Quite a few 470uF parts from various manufacturers measured around 0.3uA
after soaking a few minutes. So we can estimate 5V*0.3uA = 1.5uW loss
for the 5V storage capacitors. We'll assign another 1.5uW to the 15V
output capacitor, and a massive 2.5uW to the voltage-sensing and control
circuitry (sticking to that budget is another story).
Finally, let's assume 200000-M-ohm-uF 0.1uF input capacitor (0.5uW at
1kV), so we can now calculate our overall quiescent power consumtion,
2 + 0.5 + (1.5 + 1.5 + 2.5)/0.75 = 10uW.
Since we want an energy of 125uJ per cycle, we can calculate L = 2E/I^2
= 2*125/0.07^2 = 50mH for a 70mA peak transformer primary current. With
25mH charging inductance, we get t = I L / V = 3.5us charging time, and
since the primary discharge voltage is 100V, we'll get a 35us secondary
discharge time. If the converter is operated above 1/38.5us = 26kHz,
or 3.25W power level, it'll have a continuous inductor current, which
is just fine.
OK, folks, that's it for this installment.
Yes, Peter, it seems to me that's exactly the way to do it. By way
of illustration, see my new posting in this thread -- a micropower
1kV to 15V/5V supply paper design, which runs at one cycle every 25
seconds to supply the quiescent operating and leakage currents. Since
one cycle takes under 40us, that's a 1:625000 = 0.00016% duty cycle.
I'll comment on that. Note the 0.4uF output capacitor.
HV diode
gnd ---OOOOOO--->|--+----+--- 1kV out
====== | | 10nA
+12 ---OO--, 0.4uF |
| | 250G
FET gnd |
switch |
feedback
That means the 10nA load and the 250G feedback resistor (another 4nA)
takes 500 seconds to discharge by say 2% or 20V. During that entire
time, the bulk of the dc-dc converter circuits are turned off with a
low-power sense circuit looking for the 2% drop. The latter is running
from the +9 to 12V line and can be allowed say 1uW without notice.
It's easy to get a flexible comparator circuit to operate on 80nA.
For example, I remember being inspired by RCA's (now Harris) excellent
CA3440 opamp. This programmable BiMOS opamp is very happy running at
40nA total supply, let alone 80nA (or 10mA for that matter). In fact,
it's such an amazing part that several of its performance graphs,
bandwidth and slew-rate vs supply programming current (figs 7 and 8),
were misprinted with a uA scale which should have been nA!!! (As we
pointed out in AoE page 959.) But nobody at RCA noticed the mistake,
because clearly the incorrect value looked more likely correct than the
proper one! It's a real shame, because I'm sure some folks passed up
this part without realizing its proper capability. Sigh.
But I digress.
Anyway, once the CA3440 or whatever, realizes 1kV power is needed,
more power-hungry circuits can be switched on for the charging mode.
> In addition (or perhaps subtraction) it also seems to me that if the
> load impedance is clearly defined and stable, the need for the
> feedback resistor and its attendand circuitry could be eliminated,
> with an eye toward minimizing the total power consumption of the
> system. [ snipping good ideas to achieve this ]
Yes, good ideas, many systems should work well with such schemes.
> There still remains, however, if an extraordinary level of efficiency
> is desired, an examination of the means used to convert primary power
> to the levels needed for the application.
I'd think the first order of business would be capacitance reduction.
In the power-saving business, capacitance is not your friend.
"....They also give detailed charge data for the
gate (fig 8), which careful examination shows about
2.3nC for a 400V to 80V Vds excursion (during which
Vgs remains fixed at 5.5V).
______________________________________________________
Win
Will the next instalment include the losses in the transformer core?
altavoz <alta...@mail.idt.net> responded, in another part of the
thread. I'm copying his comments below and answering him here,
taking the opportunity to discuss more of the micropower 1000V
down-converter design.
altavoz said ...
=> On your 1KV MOSFET, is that not 20 nC rather than 2.3 nC?
You are correct in that the data sheet shows 15nC of gate charge to
move the gate to 10V while switching 400V. Moving the gate to say 15V
would cost about 20nC, as you say, but gate charge wasn't the issue.
Recall I said "careful examination shows about 2.3nC for a 400V to 80V
Vds excursion," because that's the prime region where "the gate clamps
at 4 to 5 volts," and also recall I said, "Examining the gate charge
graph for the region Vds = 400V down to 0V, we see the gate capacitance
has consumed about 7.5nC." That's not 20nC, and more important, it
was the relevant value for estimating a critical portion of the FET's
_drain_ charge.
=> Power mosfets can switch heavy currents but we pay the
=> price at the gate with hefty .025 amps as the gate clamps
=> at 4 to 5 volts while approx' 20 nC is pulled out.
Whoa! Not quite. There are several problems with your comments.
You'll note I didn't discuss gate-drive loss directly. Actually, the
gate-drive charge is even higher than 15nC, because an additional 11nC
of charge is required to get the drain from 400V to 1150V (the peak
flyback voltage, including the leakage inductance spike). This is
(over) estimated assuming an average Crdss = 15pF from 400 to 1150V.
At any rate, I suppose your point is that even as 85nC per cycle is
spent on the drain circuitry, another 26nC must be spent on the gate.
However, it's not very significant.
Remember that the drain's 85nC cost us an "energy loss of 1/2 CV^2 =
1/2 q V = 43 uJ per cycle." We can similarly calculate a gate-drive
energy loss of 0.5 26nC 10V = 0.13uJ per cycle. Compared to the
43uJ drain loss, the gate-drive loss is an insignificant 0.3% and
can be ignored. As you can see, this is because whereas the drain
supply is 1kV, the FET control supply is only say 10V.
Now about your "hefty 0.025 amps" comment. Actually, more like 0.5A
of gate current is appropriate, because 1) the inductor charging time
is a very short 3.5us, implying a quick switch-on time and 2) it's
very important to quickly switch off the FET drain while the full 70mA
inductor current continues to flow.
Using the 26nC of gate charge for the 1.15kV Vds excursion, mentioned
above, we get t = q/I = 26nC/0.5A = 52ns. Restricting the 1kV shutoff
swing to 50ns, with a truly hefty 500mA gate drive, holds the FET drain
loss down to 1/2 70mA 1150V 52ns = 2.1uJ. At only 5% of the capacitive
drain loss, I chose to ignored it. Incidentally, with only 25mA of gate
drive, as you suggested, we would spend an additional 42uJ, unacceptably
doubling the already 43uJ of drain loss.
10V ----------+---,
npn C |
,-- B |
10V | E | D
CMOS ---+ +------ 10 -- G
| E | S 1N100
'-- B 0.1uF |
pnp C | 6.8
| | |
-----------+---+------------+----
Anyway, again, with respect to a 0.5A current pulse in a micropower
designs, no problem. This is because it only lasts for 0.05us, and
creates a 0.25V dip in the 0.1uF cap of the driver circuit above.
The circuit above draws essentially no current between cycles.
Consider my 1000V pulse-frequency-modulated (PFM) dc-dc converter
running at a power level of 250uW, which requires 2 pulses/second.
Spending 0.13uJ on each gate cycle, the 0.5A gate drive consumes
only 0.25uW, or 0.1% of the delivered power.
No problem. But thanks for asking. It helped me to illustrate
that micropower and nanopower design can't be well achieved by
simply sticking to low currents and slow changes!
My intuition tells me this will zippo, but that intuition is shaped
as much from megapower design as from nanopower design.
Hmmm, clearly the core loss is zero between cycles, and during a single
cycle must be some modest % of the power transferred. I'll think more
about the transformer tomorrow at work, where I have all my core data.
Actually, this isn't just a theoretical design, but one for a serious
purpose (albeit without such a severe power budget).
Your comment puzzles me, since the input current of the CA3440
is very low, no doubt even below RCA/Harris's 10pA type spec.
Therefore it could double many times without disturbing the 40nA
total operating current I suggested, and without unduly affecting
the 10nA-scale currents one might pick for feedback components.
Incidentally, the supply current tempco is also no doubt very low.
A more relevant question would concern the tempco of the diode's
leakage current. I measured 2nA of MUR890 leakage in my 20C lab,
accounting for 2uW of loss in the design, but this would indeed
climb rapidly with temperature.
> On your 1KV MOSFET , is that not 20 nC rather than 2.3 nC? ...
This refers to another article in this 1000V nanopower/micropower
thread, with a subject header "Re: Micropower 1000V power MOSFET
dc-dc converter" and I'll reply in that thread.
______________________________________________________
>Win
> I remember being inspired by RCA's (now Harris) excellent CA3440
> opamp. This programmable BiMOS opamp is very happy running at
> 40nA total supply, let alone 80nA (or 10mA for that matter).
> In fact, it's such an amazing part that several of its performance
> graphs, bandwidth and slew-rate vs supply programming current
> (figs 7 and 8), were misprinted with a uA scale which should have
> been nA!!! (As we pointed out in AoE page 959.) But nobody at
> RCA noticed the mistake, because clearly the incorrect value looked
> more likely correct than the proper one! It's a real shame,
> because I'm sure some folks passed up this part without realizing
> its proper capability. Sigh.
--
Winfield Hill wrote:
>
> > Now perhaps we can calculate the dynamic switching loss. We'll add 7%
> > for the snubber diode (a MUR1100E is 3.5pF at 25V), or 4nC, and we'll
> > budget 25pF for the windings and transformed secondary capacitances,
> > adding 25nC. We get 56 + 4 + 25 = 85nC.
> >
> > Recall I said "careful examination shows about 2.3nC for a 400V to 80V
> Vds excursion," because that's the prime region where "the gate clamps
> at 4 to 5 volts," and also recall I said, "Examining the gate charge
> graph for the region Vds = 400V down to 0V, we see the gate capacitance
> has consumed about 7.5nC." That's not 20nC, and more important, it
> was the relevant value for estimating a critical portion of the FET's
> _drain_ charge.
>
Winfield,
Do you need the snubber? I assume the snubber diode you refer to
is connected to a parallel RC. At least for high output load R can not
be too high to avoid charging C , which must discharge between each cycle.
But perhaps I'm wrong and you are using a zener in series with the MUR1100?
This resistor and the capacitor charge steal energy during the flyback
cycle. Since we already have a a fair capacitance on the MOSFET which
I believe still has 100 volts headroom then I wonder if if the snubber is
needed. If it is, then the snubber capacitance must be on the order of the
drain
capacitance, or larger, presumably if it is really needed because of poor
transformer coupling then perhaps it might need to be much bigger. If
so the losses are not negligible. If it is equal to the drain cap then
presumably
it would be charged to 140volts or so ( assume some peaking above 100 volts
since that's why it is there ) then it would be about a 2% loss, if we assume
R is large enough to be negligible, which implies a low duty cycle.
My intuition tells me its not needed except for a safety. But then
I usually work with minimum size inductors for something like this which
means minimum energy storage in the inductor which minimizes the peaking.
Of course this comes at a heavy efficiency cost if the energy in the
inductor is only twice that needed to charge the drain capacitance.
Often in my micro power work space is as important as power, hence
450uF caps are to be avoided, even if they do make for impressive efficiency.
I hoping you could say a few words about this. I'm wondering if the
snubber is really just to damp the ringing after the flyback voltage drops
below
the 5/15/100 volt range on the various windings. For low duty cycle it seems
this could be ignored, or putting a 50 ohm resistor in series with the primary
would also be acceptable.
Chuck
This isn't a commercial product type of design, the safety margins can be
considered later. Of course, your point is correct, and this kind of
'gotcha' can really hurt if it isn't considered. The permanent shifts in
offset of CMOS inputs that can happen with large differential voltages
and the first hours of operation are another area to be careful of.
BTW, anyone tempted by the versatility of this part (CA3440) should know
that it is (sadly) classified as "Not recommended for new designs" by
Harris.
The 3140 is not so earmarked for extinction but then, it is not
programmable and is actually quite power hungry.
--
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
Spehro Pefhany "The Journey is the reward"
sp...@interlog.com
Fax:(905) 332-4270 (small micro system devt hw/sw + mfg)
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
OK, let's do the calculation. During the discharge interval the flyback
voltage will be limited to secondary voltage times the turns ratio (or
about +100V above the +1000V rail). However, after the core flux has
driven the secondary to +15V, etc., diverting the magnetizing current to
the secondary, the primary voltage continues to rise until the leakage
inductance has discharged. The primary charging inductance is 50mH, and
for a nominal non-optimized transformer, we might assume the leakage
inductance is 2% of this value, or 1000uH.
If charged to only 70mA, the 1000uH leakage inductance has 2.5uJ of
energy. If we assume about 30pF of MOSFET and transformer capacitance,
the spike will be V = I (L/C)^1/2 = 405 volts, for a total of 1505V on
the FET. Since we know even selected 1kV FETs still break down around
1175 to 1200V, we can estimate the FET will have to avalanche absorb
nearly 2.5uJ each cycle. The 1N100 is avalanche rated at 45mJ. Hmmm.
While this is for a long 3A 10mH pulse (the FET will likely have a much
lower rating for the shorter avalanche we'll see - I won't go into the
calculations here, as I've posted them on the web before), yes, clearly
the FET can handle the breakdown for the low rep rates we have.
> This resistor and the capacitor charge steal energy during the
> flyback cycle. Since we already have a a fair capacitance on the
> MOSFET which I believe still has 100 volts headroom then I wonder
> if if the snubber is needed. If it is, then the snubber capacitance
> must be on the order of the drain capacitance, or larger, presumably
> if it is really needed because of poor transformer coupling then
> perhaps it might need to be much bigger. If so the losses are not
> negligible. If it is equal to the drain cap then presumably it would
> be charged to 140volts or so (assume some peaking above 100 volts
> since that's why it is there) then it would be about a 2% loss, if
> we assume R is large enough to be negligible, which implies a low
> duty cycle.
Are we thinking of the same efficient snubber configuration? Here's
my typical snubber for applications like this:
+ 1000V
IN ---+-----+-------+-----, ,---->|---+---- 15V
| | | O || O 36t 150uF
| 0.01uF 150V O || O |
| 250V zener O || '---------+---- gnd
| | | O ||
| +-Ropt--' O || ,---->|---+---- 5V
| | 225t O || O 12t 470uF
| | 1.2kV O || '---------+---- gnd
| '--|<---+-----' core
0.1uF | A_L = 1000 nH/N^2
1.5 kV D
| -- G
| S MTP
1kV | | 1N100E
rtn --+-- 6.8 ---+--'
In a constant frequency PWM converter, the zener diode can be replaced
by a resistor, which partially discharges the capacitor between cycles.
Until the drain voltage exceeds 1150V, little snubber current flows.
This snubber steals no energy from the process (excepting the diode's
modest capacitance), not already lost by the transformer, and not
destined for some other wasteful place, such as FET avalanche.
The main way to reduce the loss is to reduce the leakage inductance.
(One alternate is a "lossless snubber," basically circuit in which
another inductor is charged to return the energy to the source.)
> My intuition tells me its not needed except for a safety. But then
> I usually work with minimum size inductors for something like this
> which means minimum energy storage in the inductor which minimizes
> the peaking. Of course this comes at a heavy efficiency cost if the
> energy in the inductor is only twice that needed to charge the drain
> capacitance. Often in my micro power work space is as important as
> power, hence 450uF caps are to be avoided, even if they do make for
> impressive efficiency.
I can understand these design constraints. Smaller is often better.
In this instance, part of the necessity for the high 50mH inductance
came from the 1000V; to keep dI/dt = V/L under control, large L was
required. As you indicated, the other part came from efficiency
constraints, but I chose a low 75%.
> I hoping you could say a few words about this. I'm wondering if the
> snubber is really just to damp the ringing after the flyback voltage
> drops below the 5/15/100 volt range on the various windings. For low
> duty cycle it seems this could be ignored, or putting a 50 ohm
> resistor in series with the primary would also be acceptable.
>
> Chuck
--
Winfield Hill wrote:
Thanks for the lesson. I will try and look up your old posts about
avalancheon DejaNews sounds very interesting.
May I make the following suggestion for an improvement to your
circuit? Since it hurts the efficiency perhaps I shouldn't use the word
improvement. Rather than stress the FET with the extra voltage and include
a Zener what if we dissipate the energy in a resistor as follows?
+ 1000V
VIN-200K-+-------------------, ,---->|---+---- 15V
| O || O 36t 150uF
| O || O |
| O || '---------+---- gnd
| O ||
| O || ,---->|---+---- 5V
| to VIN O || O 12t 470uF
| | 1.2kV O || '---------+---- gnd
| '--|<---+-----' core
1.0nF | A_L = 1000 nH/N^2
1.5 kV D
| -- G
| S MTP
1kV | | 1N100E
rtn --+-- 6.8 ---+--'
The 1nF cap discharges to about 870 volts during the turnon time.
If we have more than 130v peaking the energy is returned to the supply.
The RC time constant of the charging circuit is 200us so after 50us it will
have recovered to about 900 volts Since we expect the ramp down time of
the current to be about 36 us this is fine. This way the FET is only
subjected
to 1000v. The capacitor is discharged to about 75% in energy giving up 25%.
Yet the resistor only dissipates 9% of this 25% in charging. ( The peak
current is 1/ 7.7 times the case where we fully the case where we fully
discharge the resistor.) This is a heavy penalty, but maybe not unacceptable
for the increased margin. If we count the roughly 2% loss of the snubber
circuit against this we have only lost a net of 7%.
Now for a different thought. Because of the charge dumped by the FET
capacitance every time, we can't run Win's circuit 100 times faster so that
we can use smaller output capacitors, or a smaller transformer. Can we then
use the 15 volt supply switched on a 4th winding discharge the main FET back
to the main supply before we turn it on and greatly reduce this loss? Seems
to me if the interwinding capacitances are kept small it would work. OK so we
would have to lower the supply voltage a little but could we reduce the
dynamic switching losses by a factor of 10?
Chuck
I've often daydreamed about how to make >99.5% efficient supplies and
it is possible but I never thought of an application that justifies the
expense.
Perhaps some cryo thing where the heat load due losses is a big issue?
Winfield Hill wrote:
> In this instance, part of the necessity for the high 50mH inductance
> came from the 1000V; to keep dI/dt = V/L under control, large L was
> required. As you indicated, the other part came from efficiency
> constraints, but I chose a low 75%.
I think you are too modest. I see this as driving a 18 wheeler to work and
getting 35mpg.
Random thoughts,
Is this a place to use the super caps used as inferior lithium batteries?
Perhaps adding more windings to the secondary to stretch out the charge
pulse. Or is the impedance impossibly high even for a few kHz. I would think
the leakage would be good, especially if stacked and run below the rated
voltage.
What is the dynamic range of power you can steal from the HV stack without
screwing up the potentials enough to mess up the beam? Just curious.
Chuck
Nothing sick about that. I often dream about the circuits I'm working
on, although a middle-of-the-night insiration often turns out to be a
morning's faulty idea. Daydreams work somewhat better.
> Winfield Hill wrote:
>
>> In this instance, part of the necessity for the high 50mH inductance
>> came from the 1000V; to keep dI/dt = V/L under control, large L was
>> required. As you indicated, the other part came from efficiency
>> constraints, but I chose a low 75%.
>
> I think you are too modest. I see this as driving a 18 wheeler to
> work and getting 35mpg.
Yes, indeed. Hmmm. A 75% efficient 18-wheeler might well get 35mpg.
> What is the dynamic range of power you can steal from the HV stack
> without screwing up the potentials enough to mess up the beam? ...
I'm not clear about your question. This thread has simply been about
a paper-design idea: a micropower 1000V-to-LV converter. Most of the
awkward design constraints come from the high capacitance of the FET,
which is a much higher-power part, and not well suited for micropower
use. No smaller 1kV FETs have surfaced. The trick was to find a way
around the 1kV FET's limitations.
A real-world micropower application might well solve the design problem
by simply restricting the input voltage to say 600V, where much better-
suited FETs are available. Hah! Given sensible components, a true
_nanopower_ 500V downconverter may be possible! Certainly at lower
voltages, nanopower circuits are much easier. Maybe someday we'll
explore some of these, just for the fun of it that is, there being so
few places where challenging nanopower design is mandated over simple
of-the-shelf micropower design.
Just as I said earlier for capacitance, in nanopower and micropower
design, high voltages are not your friend!
I do have a real-world 1kV design, a beam focussing system, which has
been a behind-the-scenes insiration for this thread. However, although
a bit unusual, this is a "milli-power" design and takes up to 100mW
from a 1kV resistive-divider node, which corresponds to 2W from a 20kV
source. This certainly is in a different ballpark! For that design,
the Motorola MTP 1N100 MOSFET was an ideal part.
I like your scheme. With 196 instead of 225 turns on the primary, it
would work fine. Yes, I've used that trick before, but it's subtle
and clever and doesn't immeduately pop to mind. In this case, it has
the big advantage of allowing unselected FETs, making the circuit
acceptable for "production." It also uses fewer parts, and a much
smaller 1.5kV capacitor, so would cost less!
However, unlike my design, it won't continue to operate all the way up
to over 3 watts! In fact, it would be limited to a say 500Hz rep rate
before the snubber clamp diode will begin reducing the output voltage.
But this allows 60mW, more than acceptable for micropower applications.
Actually, to pick a nit, with 196 turns, the primary inductance will
drop from 50mH to 38mH, and the transferred energy-per-cycle to 95uJ
as well, mandating a 1.3nF 1.5kV capacitor, and the charging time will
be reduced from 3.5us to 2.67us. Hmmm, unless the shutoff current is
increased from 70mA to 80mA. Even then (back with your 1.0nF cap),
the charging time will be reduced to 3.0us. OK, that's fine. Yawn.
> Now for a different thought. Because of the charge dumped by the FET
> capacitance every time, we can't run Win's circuit 100 times faster so
> that we can use smaller output capacitors, or a smaller transformer.
That's right, we can't.
> Can we then use the 15 volt supply switched on a 4th winding to
> discharge the main FET back to the main supply before we turn it on
> and greatly reduce this loss? Seems to me if the interwinding
> capacitances are kept small it would work. OK so we would have to
> lower the supply voltage a little but could we reduce the dynamic
> switching losses by a factor of 10?
Chuck, you lost me there. Please spell it out. Or was this one of
your nightmare dreams?
Winfield Hill wrote:
> I like your scheme. With 196 instead of 225 turns on the primary, it
> would work fine. Yes, I've used that trick before, but it's subtle
> and clever and doesn't immeduately pop to mind. In this case, it has
> the big advantage of allowing unselected FETs, making the circuit
> acceptable for "production." It also uses fewer parts, and a much
> smaller 1.5kV capacitor, so would cost less!
>
> However, unlike my design, it won't continue to operate all the way up
> to over 3 watts! In fact, it would be limited to a say 500Hz rep rate
> before the snubber clamp diode will begin reducing the output voltage.
> But this allows 60mW, more than acceptable for micropower applications.
>
Very true, the dynamic range of your design was one of its most
impressive features.
> Actually, to pick a nit, with 196 turns, the primary inductance will
> drop from 50mH to 38mH, and the transferred energy-per-cycle to 95uJ
> as well, mandating a 1.3nF 1.5kV capacitor, and the charging time will
> be reduced from 3.5us to 2.67us. Hmmm, unless the shutoff current is
> increased from 70mA to 80mA. Even then (back with your 1.0nF cap),
> the charging time will be reduced to 3.0us. OK, that's fine. Yawn.
>
Speaking of nits, shouldn't the original design have 33 or 34 turns on
the 15 voltwinding instead of 36?
> > Now for a different thought. Because of the charge dumped by the FET
> > capacitance every time, we can't run Win's circuit 100 times faster so
> > that we can use smaller output capacitors, or a smaller transformer.
>
> That's right, we can't.
>
> > Can we then use the 15 volt supply switched on a 4th winding to
> > discharge the main FET back to the main supply before we turn it on
> > and greatly reduce this loss? Seems to me if the interwinding
> > capacitances are kept small it would work. OK so we would have to
> > lower the supply voltage a little but could we reduce the dynamic
> > switching losses by a factor of 10?
>
> Chuck, you lost me there. Please spell it out. Or was this one of
> your nightmare dreams?
>
O.K. let me try, it was in fact the subject of my dream (which wasn't a
nightmare but does force one to face his inner geek 8-) . When the MOSFET
turns on 30-40pf at 1000 volts of energy gets wasted. If there was only say
200-300 volts on the FET then we would only lose about 10% as much energy.
Now good switching power supplies can move stored energy from one place to
another with little loss, and by shear coincidence the problem FET just
happens to be connected to such a system. If we "charge" up the inductor with
a low voltage winding with just the right amount of energy and allow it to
flyback then we can suck this charge back onto the 1nF input capacitance,
just before we turn on the main FET.
The exact energy required depends on the various voltages and capacitance
involved, but it is on the order of (1/2)*(C=40pF)(V=1000V)^2 the or 20uJ.
Much less than the power going into the inductor on the "power stroke" of the
main FET. We could use the 1000V input to supply this energy but that would
require another 1000V FET compounding the problems. Instead we use a low
voltage winding and a low voltage FET protected from reverse flow with a
series diode. On this low voltage winding (perhaps even one of the 5 or 15
volt windings ) we can use a small low voltage FET to introduce the 20uJ.
Since the gate capacitances and drain voltages can be much less we should be
able to do it with only say 2uJ of losses.
The net effect should be that we expend 22uJ each cycle from the output
power supply, plus another 20uJ stored on the FET capacitance to put 40uJ of
energy back into the 1000volt supply. Thereby reducing the lost energy by a
factor of 10.
I hope that made some sense.
Chuck
Hmmm, time for those lifetime-supply buys! For those interested,
the datasheet for the only explicitly-labelled "nanopower" opamp
around, the glorious CA3440, is on the Harris' web page:
http://www.semi.harris.com/data/fn/fn1/fn1318/index.htm
For our next exercise, a micropower "1kV opamp," for use with our
other micropower 1kV circuits in this thread. Hmm, deprived of the
CA3440's excellent 26V 50nA power-supply capability, what opamp IC
shall we use? First, we can assume that a low-voltage supply is
available, from which the 1kV has been generated, or one created
from 1kV by a step-down converter like that discussed previously.
A 1kV opamp amplifier is not at all new concept; we showed a simple
circuit in AoE, fig 3.75, page 169. However, that piezo-amplifier
circuit takes over 2000mW of power at 500V out. OK, let's try using
that circuit, but starve it!
We'll run both of the FETs at 5nA mid-scale, with 100G resistors,
consuming 10uW of power from the 1kV supply.
1kV ---+--------+---
| | Fig. 3.75, less the
100G | bells and whistles,
| D modified for low power.
+6V +---+- G MTP
| | | S 1N100
----- + D | |
--- G '-|<-+----- out
--+-- - S 6V |
| | | 100G
| gnd gnd |
'----------------------+
|
400M
An opamp driving the |
FET is "visible" with gnd
illusory contours.
The feedback network is unconnected, and a user should note that the
FET inverts the opamp phase. Employing a totem-pole output stage,
this circuit can source or sink nearly an amp of output current.
The 100G pullup resistor forces a slow speed for our amplifier, by
creating a roughly 0.06Hz pole with the two FET's capacitances.
We've started by dividing the maximum 1kV output by 250, to just 4V,
so a 6V single-supply opamp can be used. A 4 to 5V opamp supply is
also possible, with reduced FET output sink capability.
Actually, due to the 1N100's 400G-ohm typical leakage slope,
a maximum output voltage range of only 0 to 800V is possible.
This yields 0.0 to 3.2V on the divider.
Now, for the opamp choice. Since the critical output stage already
consumes 10uW, we should only allow 2 to 3uW for the opamp. Hey,
fair's fair. This means the opamp circuit gets 300 - 500nA from our
6V supply. No problem for the above-referenced CA3440 programmable
opamp, which has a 2kHz GBW and 0.13mV/us slew rate at 250nA supply
current (set=25nA), leaving some current for feedback components.
MAXIM has some 1uA entries, but these aren't programmable and
consume a piggy 6 - 8uW, more than doubling the power consumption.
Another classic programmable opamp, the Harris CA3078, may be able
to operate at 0.25uA, and has _very_ useful external compensation.
Most of these parts are in AoE table 14.7, but the data there is
restricted to 10uA and higher operation.
250nA 1000nA supply
INPUT --------- ----------
EXT to GBW slew PROG GBW slew
COMP -V kHz V/us Iq kHz V/ms special comments
-- -- --- ---- -- --- ---- ----------------
CA3440 - x 2 1.3 x 6 4 low input current
CA3078 x - 2 5 est x 10 25 est G=10 ext R-C comp
LM4250 - - - - x 8 3 the original prog amp
OP32 - x - - x 10 3 discontinued ?
MC3476 - - 4 2 est x 25 7 est
MAX406 2 x - - - 8 5 2 compensation modes
40 20 decompensated mode G>2
MAX409 - x - - - 40 80 G=10
Can anyone suggest another good candidate for our sub-1uA table?
The CA3440 is an excellent candidate for this application, because
its MOS inputs, which can go all the way to 0V, don't mind the 400M
impedance presented by the output stage pulldown/divider.
On the other hand, except for the MAXIM parts, which won't work at
0.25uA, the other micropower opamp inputs don't go to ground. This
can be fixed with an additional -V supply, but it's a pain. More
significant, they have bipolar inputs with rather high bias currents
(lacking darlington-input stages). For example, the MC3476 working
0.25uA has an estimated input bias current of perhaps 3nA, judging
from the curves, which would cause an unacceptable 1.2V of input
offset error with the 400M feedback! The CA3078A is better, with
curves showing 1nA at 1uA supply, and perhaps 350pA at 250nA supply
current, implying input transistors with h_FE = 35 at Ic = 12nA,
and holding the 800M error down to 140 mV. [:-(]
If we balance the 3078 inputs with another 800M resistor, and
assume 20% beta matching at 12nA, then the error is about 25 mV.
:-(
The CA3440 looks to be the best part for the job. Comments?
Hmmm. Although a 100V schottky diode could be used for the 5V output,
the 15V output needs at least 150V of reverse capability, and must
therefore be a silicon diode, with a greater drop. The secondary turns
ratio is therefore 15.8/5.3 = 2.98 and the 15V winding is 2.98*12 = 35.76
= 36 turns. Since you asked. ;-)
>>> Now for a different thought. Because of the charge dumped by the FET
>>> capacitance every time, we can't run Win's circuit 100 times faster so
>>> that we can use smaller output capacitors, or a smaller transformer.
>>
>> That's right, we can't.
>>
>>> Can we then use the 15 volt supply switched on a 4th winding to
>>> discharge the main FET back to the main supply before we turn it on
>>> and greatly reduce this loss? Seems to me if the interwinding
>>> capacitances are kept small it would work. OK so we would have to
>>> lower the supply voltage a little but could we reduce the dynamic
>>> switching losses by a factor of 10?
>>
>> Chuck, you lost me there. Please spell it out. Or was this one of
>> your nightmare dreams?
>>
>
> O.K. let me try, it was in fact the subject of my dream (which wasn't a
> nightmare but does force one to face his inner geek 8-). When the MOSFET
> turns on 30-40pf at 1000 volts of energy gets wasted. If there was only
> say 200-300 volts on the FET then we would only lose about 10% as much
> energy. [ snip ]
Sorry, Chuck, surely I should study your idea further, but haven't you
missed a fundamental point. We've got a 1000V input and in general won't
we need a 1kV FET switching that 1000V? Every time said FET turns on,
it'll take 26uJ of energy to discharge it's monster self-capacitance and
turn it into heat, shorting it into ground. Even a resonant converter
won't solve that problem.
Am I missing something?
Winfield Hill wrote:
> Chuck Parsons, <ch...@CatenaryScientific.com> said...
> >
> >Winfield Hill wrote:
> >
> >> I like your scheme. With 196 instead of 225 turns on the primary,
> >> it would work fine. ...
> >
> >> Actually, to pick a nit, with 196 turns, the primary inductance will
> >> drop from 50mH to 38mH, and the transferred energy-per-cycle to 95uJ
> >> as well, mandating a 1.3nF 1.5kV capacitor, and the charging time will
> >> be reduced from 3.5us to 2.67us. Hmmm, unless the shutoff current is
> >> increased from 70mA to 80mA. Even then (back with your 1.0nF cap),
> >> the charging time will be reduced to 3.0us. OK, that's fine. Yawn.
> >
> > Speaking of nits, shouldn't the original design have 33 or 34 turns
> > on the 15 volt winding instead of 36?
>
> Hmmm. Although a 100V schottky diode could be used for the 5V output,
> the 15V output needs at least 150V of reverse capability, and must
> therefore be a silicon diode, with a greater drop. The secondary turns
> ratio is therefore 15.8/5.3 = 2.98 and the 15V winding is 2.98*12 = 35.76
> = 36 turns. Since you asked. ;-)
>
Ahh you rasculby rabbit you! ( What is the correct spelling for Elmer
Fudd's version of rascal?)
> >> Chuck, you lost me there. Please spell it out. Or was this one of
> >> your nightmare dreams?
> >>
> >
> > O.K. let me try, it was in fact the subject of my dream (which wasn't a
> > nightmare but does force one to face his inner geek 8-). When the MOSFET
> > turns on 30-40pf at 1000 volts of energy gets wasted. If there was only
> > say 200-300 volts on the FET then we would only lose about 10% as much
> > energy. [ snip ]
>
> Sorry, Chuck, surely I should study your idea further, but haven't you
> missed a fundamental point. We've got a 1000V input and in general won't
> we need a 1kV FET switching that 1000V? Every time said FET turns on,
> it'll take 26uJ of energy to discharge it's monster self-capacitance and
> turn it into heat, shorting it into ground. Even a resonant converter
> won't solve that problem.
>
> Am I missing something?
Yes. The point is to use a carefully timed pre-pulse through the inductor to
discharge
the FET self capacitance, so that the instant you turn it on it has zero (or
much less than
1000 V) across it.
Trying to be brief, Assume we added a 4 turn winding on the secondary.
If we switch 15 volts on this winding what happens on the primary?
225/4*15=844volts. We use this pulse to discharge the 1000V FET to 160 volts
and turn it on at the low point in the Voltage waveform. The FET goes on
with only 160 volts across it. Of course, when it turns off it goes to 1000
volts
or higher, but the majority of the losses in this circuit are at turn on, not
turn off.
For slightly more detail. Because initially the input and outputs of the
primary
windings are at the same potential, the 4 turn winding will have very low
reactance causing excessive I^2R losses. To fix this we add a small external
inductor in series with the 4 turn winding, to limit the in rush current and
store
the energy in a recoverable manor. This allows the voltage across the 4 turn
winding to increase in proportion to the voltage difference on the primary as
the 1000V FET discharges. By carefully timing the duration of the 15 volt
pulse we put across the 4 turns and external inductor we can put in just
enough
energy to discharge the 1000 volt FET. I am thinking of order of 1 us to
discharge
the FET.
Chuck
I fear you're missing the forest for the trees here. Our reality is the
26uJ of energy to be removed from the FET in order to turn it on. If we
simply turn on the FET, it removes the charge and expends the energy into
ground. If we invoke another circuit to do this job, _that circuit_ will
waste 26uJ on the task. Right? Now, if one were really clever and found
a way to remove, strike that, transfer, the FET capacitance energy into an
inductor and thence to the load or back into the 1kV source...
> Of course, when it turns off it goes to 1000 volts or higher, but the
> majority of the losses in this circuit are at turn on, not turn off.
Whoa. Admittedly tuirnoff is a primary place where losses occur, but recall
we took special pains to turn off the FET quickly, minimizing this loss. The
primary instant where energy is wasted and is turned into heat occurs during
the FET capacitance discharge, as the drain voltage goes from 1000V to under
1V. While we can control and minimize the loss during turnoff, the waste
during turnon is seemingly unavoidable and a shame.
> For slightly more detail. Because initially the input and outputs of the
> primary windings are at the same potential, the 4 turn winding will have
> very low reactance causing excessive I^2R losses. To fix this we add a
> small external inductor in series with the 4 turn winding, to limit the
> in rush current and store the energy in a recoverable manor. This allows
> the voltage across the 4 turn winding to increase in proportion to the
> voltage difference on the primary as the 1000V FET discharges. By carefully
> timing the duration of the 15 volt pulse we put across the 4 turns and
> external inductor we can put in just enough energy to discharge the 1000
> volt FET. I am thinking of order of 1 us to discharge the FET.
The time isn't important.
Chuck, you may be aiming at something here, and it may be growing in your
mind... A scheme whereby the aforementioned lost energy is removed from
the FET but saved in an inductor.. And then captured and returned for
use... someplace. Perhaps a secondary for this inductor, returning its
flyback energy into the +15V storage capacitor, whence it came, via another
diode. Almost like perpetual motion. Please continue and spell it out
for us. The devil's in the details.
Winfield Hill wrote:
> Chuck Parsons, <ch...@CatenaryScientific.com> said...
> >
> > Winfield Hill wrote:
> >>
> >> Sorry, Chuck, surely I should study your idea further, but haven't you
> >> missed a fundamental point. We've got a 1000V input and in general won't
> >> we need a 1kV FET switching that 1000V? Every time said FET turns on,
> >> it'll take 26uJ of energy to discharge it's monster self-capacitance and
> >> turn it into heat, shorting it into ground. Even a resonant converter
> >> won't solve that problem.
> >>
> >> Am I missing something?
> >
> > Yes. The point is to use a carefully timed pre-pulse through the inductor
> > to discharge the FET self capacitance, so that the instant you turn it on
> > it has zero (or much less than 1000 V) across it.
> >
> > Trying to be brief, Assume we added a 4 turn winding on the secondary.
> > If we switch 15 volts on this winding what happens on the primary?
> > 225/4*15=844volts. We use this pulse to discharge the 1000V FET to 160
> > volts and turn it on at the low point in the Voltage waveform. The FET
> > goes on with only 160 volts across it. ...
>
> I fear you're missing the forest for the trees here. Our reality is the
> 26uJ of energy to be removed from the FET in order to turn it on. If we
> simply turn on the FET, it removes the charge and expends the energy into
> ground. If we invoke another circuit to do this job, _that circuit_ will
> waste 26uJ on the task. Right? Now, if one were really clever and found
> a way to remove, strike that, transfer, the FET capacitance energy into an
> inductor and thence to the load or back into the 1kV source...
>
Am I really that obscure? I tried to be clear that the Primary winding
discharges the FET back into the 1000V supply where we can easily re-use the
energy. At the beginning of the FET discharge into the 1000V supply we can move
charge for very little energy because there is little potential difference. As
the FET discharges though quickly we have to add energy because we are making the
charge run uphill. The energy on the FET is _not_ stored on the inductor
(transformer), but energy from the inductor ( transformer ) is added to move the
charge back into the 1000v power supply. As I said in an earlier post:
> The net effect should be that we expend 22uJ each cycle from the output
>power supply, plus another 20uJ stored on the FET capacitance to put 40uJ of
>energy back into the 1000volt supply. Thereby reducing the lost energy by a
>factor of 10.
You are correctly using a higher capacitive value than I am, so I should
modify this statement to be
> The net effect should be that we expend 31uJ each cycle from the output
>power supply, plus another 28uJ stored on the FET capacitance to put 56uJ of
>energy back into the 1000volt supply. Thereby reducing the lost energy by a
>factor of 10.
Because we have spent 31+28=59uJ to put 56uJ of energy back into the 1000v
supply wasting 3uJ. 28uJ of the 56 comes from the stored energy on the FET
capacitance, and 28uJ is supplied by the transformer because to move the charge
off the FET to the 1000V supply an average potential of 500V must be overcome
When we just dumped the stored charge to ground we wasted 28uJ.
> > volt FET. I am thinking of order of 1 us to discharge the FET.
>
> The time isn't important.
>
I agree because I am mostly interested in the in pedagogic value of this, but I
wanted to forestall arguments about whether its practical instead of possible.
> Chuck, you may be aiming at something here, and it may be growing in your
> mind... A scheme whereby the aforementioned lost energy is removed from
> the FET but saved in an inductor.. And then captured and returned for
>
That is another way to do it, but as I imagine it, requires another 1000V FET
postponing the problem. The inductor, or using the transformer in flybackmode, in
my scheme is merely a convenient way to produce a transformer output voltage that
tracks the difference between the Voltage on the discharging FET capacitance and
the 1000 volt supply.
> use... someplace. Perhaps a secondary for this inductor, returning its
> flyback energy into the +15V storage capacitor, whence it came, via another
> diode. Almost like perpetual motion. Please continue and spell it out
> for us. The devil's in the details.
ACK!
The most feared question of all from an expert! "I don't understand could you
please spell it out?" I fear nothing less than a detailed schematic with real
components will satisfy you. That is a project for the weekend particularly with
my lack of ASCIImatic skills.
I would like to take most of your power supply circuit for granted, and show
that it is reasonable to use a 15 volt supply and a transformer with 225 turns
connected to a 1000 Volt supply on one end. The other end of the 225 turns is
connected to 56pF of capacitance in parallel with a 10ohm switch to ground. On
the other side of the transformer I have X turns, 5 Volts, 15 Volts, and
circuitry I specify. The circuitry I specify takes a single input "CYCLE" and
produces a delayed output "FET ON" which closes the FET switch after discharging
its self capacitance.
The goal is to show that we can turn on the 10 ohm switch for at least 1ns
(2RC time constants) with energy losses of only a small fraction of 28uJ loss we
would expect if we just turned on the switch doing nothing. Energy loss is
defined as net energy loss from all three supplies (5,15,1000) it being agreed
that energy in all three supplies is easily available for our purposes, So no
penalty is assessed for reapportioning the energy between these supplies.
I would appreciate any comments or gottcha's you have in mind before the
weekend, in hopes of actually producing a single posting that answers your
questions and can be followed by everyone. For instance is lumping the FET and
stray capacitance as I describe sufficient for this exercise?
The numbers are nice, but the circuit topology is vague. Just what do you mean,
"Primary winding discharges the FET back into the 1000V supply?" What, exactly
causes that to happen? It's one thing to postulate moving some energy around,
but when implementing the scheme, old Murphy can spring up and grab the cake,
leaving us with crumbs!
>> Chuck, you may be aiming at something here, and it may be growing in your
>> mind... A scheme whereby the aforementioned lost energy is removed from
>> the FET but saved in an inductor.. And then captured and returned for
>> use... someplace. Perhaps a secondary for this inductor, returning its
>> flyback energy into the +15V storage capacitor, whence it came, via another
>> diode. Almost like perpetual motion.
> That is another way to do it, but as I imagine it, requires another 1000V FET
> postponing the problem.
What? No, no, weren't you suggesting using the 15V supply? Then of course we're
talking a low-turns winding, and a hopefully more efficient, low-capacitance low-
voltage FET and returning the power to the +15 storage cap. I have a sketch for
a scheme which I (erroneously) thought you were suggesting. That is, a second
inductor, switched from 15V, onto a 4th winding to supply the FET discharge
current, meanwhile charging itself with said energy. And a secondary winding
on that inductor to facilitate transferring its stored energy back to say the 15V
supply. Without more careful analysis it's not clear that scheme doesn't have
its own equivalent losses, but it looks hopeful. And if workable, it might allow
rethinking the whole scale of the per-cycle energy transfer, allowing a faster
cycle rate, reducing the storage cap size thereby reducing another major loss.
> The inductor, or using the transformer in flybackmode, in my scheme is merely a
> convenient way to produce a transformer output voltage that tracks the
> difference between the Voltage on the discharging FET capacitance and the 1000
> volt supply.
Now you've lost me again. What's that needed for?
> Please continue and spell it out for us. The devil's in the details.
>
> ACK!
>
> The most feared question of all from an expert! "I don't understand could you
> please spell it out?" I fear nothing less than a detailed schematic with real
> components will satisfy you.
Not at all, but a skecth would do! ;-) Or at least a coherent description of
the pieces. An idea or "scheme" isn't worth anything if no corresponding reality
is possible, natch!
> I would like to take most of your power supply circuit for granted, and show
> that it is reasonable to use a 15 volt supply and a transformer with 225 turns
> connected to a 1000 Volt supply on one end. The other end of the 225 turns is
> connected to 56pF of capacitance in parallel with a 10ohm switch to ground. On
> the other side of the transformer I have X turns, 5 Volts, 15 Volts, and
> circuitry I specify. The circuitry I specify takes a single input "CYCLE" and
> produces a delayed output "FET ON" which closes the FET switch after discharging
> its self capacitance.
OK so far.
> The goal is to show that we can turn on the 10 ohm switch for at least 1ns
> (2RC time constants) with energy losses of only a small fraction of 28uJ loss we
> would expect if we just turned on the switch doing nothing. Energy loss is
> defined as net energy loss from all three supplies (5,15,1000) it being agreed
> that energy in all three supplies is easily available for our purposes, So no
> penalty is assessed for reapportioning the energy between these supplies.
Yep, OK.
> I would appreciate any comments or gottcha's you have in mind before the
> weekend, in hopes of actually producing a single posting that answers your
> questions and can be followed by everyone. For instance is lumping the FET
> and stray capacitance as I describe sufficient for this exercise?
For this exercise, of course. Use 55pF (includes transformer self-capacitance)
and 1kV. Just remember, Chuck, this is simply a mental exercise now, one of
those proverbial "42 jobs."
Winfield Hill wrote:
> > The goal is to show that we can turn on the 10 ohm switch for at least 1ns
> > (2RC time constants) with energy losses of only a small fraction of 28uJ loss we
> > would expect if we just turned on the switch doing nothing. Energy loss is
> > defined as net energy loss from all three supplies (5,15,1000) it being agreed
> > that energy in all three supplies is easily available for our purposes, So no
> > penalty is assessed for reapportioning the energy between these supplies.
>
> Yep, OK.
>
> > I would appreciate any comments or gottcha's you have in mind before the
> > weekend, in hopes of actually producing a single posting that answers your
> > questions and can be followed by everyone. For instance is lumping the FET
> > and stray capacitance as I describe sufficient for this exercise?
>
> For this exercise, of course. Use 55pF (includes transformer self-capacitance)
> and 1kV. Just remember, Chuck, this is simply a mental exercise now, one of
> those proverbial "42 jobs."
>
>
> Well I spent quite a bit of time on this over the weekend, and must confess that I
> am not going to give the circuit promised. I learned a fair amount particularly
> since I used spice for the first time. I downloaded the demo version of Microsim,
> found I couldn't add custom parts and then tried AIM-Spice. I had a fair number of
> problems with convergence, and at least once or twice results that I'm sure are
> wrong. This doesn't mean I found the products useless. But, like every simulator
> I've ever used you can't expect to use them with out understanding in detail how
> they work and the limitations of the models used. I am considering buying Microsim,
> happy to hear any thoughts on this. I am a little worried about not being able to
> get at the models enough, but the schematic entry and cross-probing are really nice
> and certainly speed things up.
I found it is pretty easy to make an oscillator with a transformer if you aren't
careful. Also there is a lot going on in this transformer that restricts what you can
do. The fact that Win choose a FET right against its specs doesn't help either.
Finally, if you want to discharge the FET efficiently you have to consider that the
load is entirely capacitive, and you just can't drive square pulses into a capacitor
without loss. (the standard CMOS problem really). Hence my desire to use fly back. The
designs I tried with adding another winding to the transformer had problems meeting
the constraints formed by the other windings, and frequently oscillated. Adding lots
of extra switches on the windings didn't seem worth it. Using a second transformer is
also an option, but doesn't totally free you from being coupled to the other windings.
In short I submit that it can be done, but I have to spend some time on things that
actually earn me a living. Actually bread boarding a couple of approaches would be the
way to go at this time for me. There wouldn't be any doubt about the models and for
such a circuit it wouldn't take long, if the parts were handy.
To demonstrate the general idea, and therefore not wimp out entirely, I show the
following simple circuit that works fine, is easy to understand and only requires that
Motorola saw its MTP1N100E FET's into smaller pieces so that we have a smaller
capacitance 1000V fet. Actually for supplies running off the rectified line voltage I
think the change has merit. It can save a couple of watts on a 150W PC power supply,
and if you consider leaving the power supply on for 8,500 hours a year, gives you
$1.70 @$0.10/KWH pear year to pay for the mods. I'm all too well aware though that
adding $2 cost to a PC to produce 15 cents a month savings on your electric bill
doesn't make it through a marketing review.
Here is the design. I'll call the nonexistent FET a MTP1N100E2% assuming that it has
2% of the area of the MTP100E and therefore has 450 Ohms on resistance (9/0.02) and
3pF or so capacitance.
+ 1000V
|- IN ---+-----+-------+-----, ,---->|---+---- 15V
| | | | O || O 36t 150uF
| | 0.01uF 150V O || O |
| | 250V zener O || '---------+---- gnd
| | | | O ||
| | +-Ropt--' O || ,---->|---+---- 5V
| | | 225t O || O 12t 470uF
| | | 1.2kV O || '---------+---- gnd
| | '--|<---+-----' core
| 0.1uF |-----------------+
| 1.5 kV D |
| | S1 -- G |
| | S MTP o||
| 1kV | | 1N100E o||
| rtn --+-- 6.8 ---+--| o|| 1mH
| | 1.2KV o||
'----------------------------|<----------+
| |
| D
| S2-- G
| S MTP
| | 1N100E2%
+--------------+--'
S1 and S2 have to be carefully timed. I get good results with the following:
S2 on 370ns S1 on 3.6us
------------ ----------------------------------|
| | | |
| | | |
| | 160ns | |
| S2 |-------| S1=3.6uS |
With the peak current through the 2%FET of 200ma. The I2R losses are quite small on
the order of 0.1^2*500ohms*0.5E-6s =0.25uJ. The major loss is now the 3pf*1000V^2 of
the smaller fet or 1.5uJ. The timing could be produced with a 74hc121 or such device.
The required tolerance of the timing is not huge +-5% is more than adequate. This
method also takes care of the transformer stray capacitance
Chuck
>> Well I spent quite a bit of time on this over the weekend, and must confess
>> that I am not going to give the circuit promised. I learned a fair amount
>> particularly since I used spice for the first time. I downloaded the demo
>> version of Microsim, found I couldn't add custom parts and then tried
>> AIM-Spice. I had a fair number of problems with convergence, and at least
>> once or twice results that I'm sure are wrong. This doesn't mean I found
>> the products useless. But, like every simulator I've ever used you can't
>> expect to use them with out understanding in detail how they work and the
>> limitations of the models used. I am considering buying Microsim, happy to
>> hear any thoughts on this.
Try Intusoft's downloadable SPICE demo first.
> I found it is pretty easy to make an oscillator with a transformer if you
> aren't careful. Also there is a lot going on in this transformer that
> restricts what you can do. The fact that Win choose a FET right against
> its specs doesn't help either. Finally, if you want to discharge the FET
> efficiently you have to consider that the load is entirely capacitive, and
> you just can't drive square pulses into a capacitor without loss. Hence my
> desire to use fly back. The designs I tried with adding another winding to
> the transformer had problems meeting the constraints formed by the other
> windings, and frequently oscillated. Adding lots of extra switches on the
> windings didn't seem worth it. Using a second transformer is also an option,
> but doesn't totally free you from being coupled to the other windings.
>
> In short I submit that it can be done, but I have to spend some time on
> things that actually earn me a living. Actually bread boarding a couple of
> approaches would be the way to go at this time for me. There wouldn't be any
> doubt about the models and for such a circuit it wouldn't take long, if the
> parts were handy.
>
> To demonstrate the general idea, and therefore not wimp out entirely, I show
> the following simple circuit that works fine, is easy to understand and only
> requires that Motorola saw its MTP1N100E FET's into smaller pieces so that we
> have a smaller capacitance 1000V fet.
Hah! That solution carried to its proper extreme, would eliminate the putative
problem entirely, or at least reduce it to a tolerable nuisance.
> Actually for supplies running off the rectified line voltage I think the change
> has merit. It can save a couple of watts on a 150W PC power supply, and if you
> consider leaving the power supply on for 8,500 hours a year, gives you $1.70
> @$0.10/KWH pear year to pay for the mods. I'm all too well aware though that
> adding $2 cost to a PC to produce 15 cents a month savings on your electric
> bill doesn't make it through a marketing review.
>
> Here is the design. I'll call the nonexistent FET a MTP1N100E2% assuming that
> it has 2% of the area of the MTP100E and therefore has 450 Ohms on resistance
> (9/0.02) and 3pF or so capacitance.
What! 2% of the area? I rest my case!
> transformer stray capacitance.
Well, Chuck, pretty good work. Yes, along with my own calculations (see last
week's post) I do believe your idea has merit. Of course, Motorola sadly is
not likely to saw 98% off their 1kV FETs any time soon.
Also, good luck with your new-found SPICE skills!
[... snip Win's outstanding analysis]
> Also, good luck with your new-found SPICE skills!
[...]
MicroSim is my least favorite SPICE company. They make the most
user-hostile software I have ever seen.
Charlie Hymowitz does a nice job on IntuSoft, and the
application notes and SPICE models are unbeatable. His demo is
good also.
But the easiest SPICE software I have found to work with is
MicroCap V, at
It's not perfect by any means, but the free demo is quite good
and can handle enough nodes for reasonable circuits.
Convergence is very good. You will have to add models for most
of the devices you need, but it takes SPICE models from nearly
anything, including PSpice. All you need is the trick on
getting them into the library.
Best Regards,
Mike
CEO, Analog & Digital Design
Automated Production Test
http://www.csolve.net/~add/home.htm
Hosting Jonathan Ramsey's Pascal TCP/IP for DOS:
http://www.csolve.net/~add/zips/tcp.htm
Which hopefully you're going to tell us about next? ;-)
-- Win
I found the demo to be buggy in the transformer area, but that may have
been corrected. You should also look at TINA (from DesignSoft Inc.) - I
don't have a URL, sorry.
[megasnip]
Be sure to try it again. For the longest time they only had a very old
version available on the net for downloading. Now they have the latest
super-hot-shit version, which has been changed and improved so much it's
amazing. Sadly I'm still working with an old officially-liscensed
ICAPS/4Windows version 7.6 - they still call it ICAPS/4 but searching
deeply enough will reveal it's version 8.0 while paid user updates are
version 8.1. When I'm doing something small and simple, or if I forget
the dongle, I use the new free version. I really do prefer it.
Here's what they say about the free download,
Demonstration Features Description
Schematic Entry
SpiceNet has no limitations. It is the same as the production
version. IsSpice4 will only accept SPICE netlists with fewer
than 20 top level components.
Ease-of-Use Includes Analysis and Convergence Wizards, Tutorial
Help Movies, Interactive Cross-probing, automatic
parameter sweeping/curve family generation and custom
SPICE attribute dialogs.
SPICE Simulator
Circuit Size Limited to 20 main circuit (top-level) elements,
special limitations are applied to subcircuits
Interactive Features Yes; change values and run different analyses
interactively using SpiceNet-IsSpice4 interface.
Real Time Display Yes; add, delete, and rescale waveforms as the
simulation runs
Analysis Types AC, DC, Operating point, Temperature, Fourier,
and Transient Elements. All SPICE 2 and SPICE 3
elements
Behavioral Models Yes, In-line Equations, Laplace, If-Then-Else,
Boolean Logic, & X-Y Tables
Model Libraries 75+ parts
Data Analysis Includes full capability including cross-probing,
display, printing, waveform measurements, cursor
measurements and waveform math.
NOTE: Although shown in the Actions menu and in the ICAPS… and Simulation
Setup dialogs, the evaluation version DOES NOT support Monte Carlo,
Optimization, Sensitivity, Transfer function, Noise, and Distortion analyses.
In another place, they also say, "If you download the new SpiceNet program
from the Intusoft web site, the following ICAP/4 version 8.1 features will
not be available:
· No cross-probing on the schematic and no operating point voltage display.
· No Alter/Parametric Sweep dialog.
· No use of Busses
· No increase in model library size (8.1 libraries have over 10,000 parts,
an increase of over 2000)
· Can’t use tolerance/sweep tab in Part Properties dialog
· Can’t use failure modes tab in Part Properties dialog
· Can’t perform failure analysis using advanced ICAPS Fault feature
· Passed Parameters must be entered manually in the Part Properties dialog,
User field for each parameter you want to pass into a generic subcircuit
You must purchase the 8.1 update in order to add these features."
But it's pretty damm good for free.
[big snip]
> But it's pretty damm good for free.
> Winfield Hill hi...@rowland.org
> Rowland Institute for Science
> Cambridge, MA 02142
There is a catch. Intusoft is going completely WIN 95/NT. I asked Charles
why - he said their new compiler no longer supports Win 3.x. When you see
compilers that require 550 megabytes, there has to be some reason other
than not enough memory.
MicroCap runs on all Windows platforms. They get their compiler from
another company.
John Woodgate wrote:
> > Try Intusoft's downloadable SPICE demo first.
>
> I found the demo to be buggy in the transformer area, but that may have
> been corrected. You should also look at TINA (from DesignSoft Inc.) - I
> don't have a URL, sorry.
>
> [megasnip]
Many thanks for the suggestions Win, John, and Mike. I've download MicroCapV
and ICAP4. I will search out TINA.
MicroCapV seemed quite nice for a lot less money than MicroSim. I liked the
fact that when I clicked on properties in ICAP4 it showed them _all_ to me. I like
to be reminded about what I need to know. Microsim just showed a few parameters,
which looks good in a demo, but lets you down when you want to change something.
Personally, I don't care about Win 3.1 shared file systems are important to me,
when I plug in my laptop in front of the TV all my files are available to me over
the ethernet. So for myself, I like the Win95/WinNt 4.0 look and feel, though I use
Linux too. ICAP4 didn't look as nice but it did seem easier to learn.
Probably, I'll wait a bit to buy and try to make an informed opinion. Who doesn't
have dongles? I don't steal software or merchandise. The department stores don't
make me wear manacles. However, I prefer a dongle that I can move from the laptop
to the desk system, to a node locked license.
Does anyone know anything about Dr. Spice?
http://www.deutsch.com/homepg.htm
They also have a free demo, don't know the price yet.
I forgot the trick!
So, I had to do a bit of research (3,020 milliseconds,
3,576,441 bytes in 64 files, 2 directories, 10 matches...)
It turns out this was a problem that only me, The Master of
Malfunction, could bungle.
I downloaded MicroCap V, Version 1.3, and ran the demos, but
didn't really have time to get into it.
A short time later, I discovered Version 2.0 was on their web
site, so I installed it on top of the previous version.
It ran fine, but I could not add any model information to a
simple circuit. It complained it couldn't find a file called
"NOM.INX".
A quick email to sup...@spectrum-soft.com got an immediate
response, which I post here:
---------------------------------------------------------------
Mike,
It should be looking for either a NOM.LIB or NOM.INX file. Try
going into the Data directory and deleting the file called
NOM.INX.
It may be that the file is from Version 1.3 or it just got
trashed when created. The NOM.INX file doesn't come with the
demo, it is created the first time it needs a library
component.
Regards,
Bill Steele
---------------------------------------------------------------
Bill's diagnoses was exactly correct, and his advice worked
perfectly!
My email was sent on Date: Wed, 9 Jul 1997 02:42:38 -0700.
Bill's reply came on Date: Wed, 9 Jul 1997 12:14:02 -0500.
I have no idea how to decipher the GMT offsets, but this is
pretty good turnaround for support on a freebie!
Everything else was easy. MicroCap V imports the older DOS
version CIR files without even asking if you want to update. It
also copies across any model information that it doesn't
already have, and puts it in the CIR file. It also lets you
know when it has a duplicate, and takes you into the CIR file
so you can delete the extraneous info if you want to.
I believe setting up the Voltage and Time scales in Transient
Analysis is a fiendish plot to make a Saint swear, but the
Schematic Editor is a big improvement over the DOS versions.
That's the story. Overall, I'd recommend using MicroCap to get
your feet wet. Download all the tutorials at
http://www.intusoft.com/Tech.htm, including
Converg.pdf: Solving SPICE convergence problems, and
Correlat.pdf: Comparisons of SPICE simulations and real hardware
When you are ready to move up to the Big Iron, take a real hard
look at what your needs are. Do you want a fast way to get
answers to simple problems, or do you want to model the noise
response of a UHF start-stop PLL for data recovery, that has to
handle missing transitions?
Some vendors will swamp you with a constant barrage of new
software add-ons to buy - do you need that? And consider where
are you going to get the support and reference material you
will need? (Intusoft has the best selection of books - they are
invaluable.)
When you do make a choice, remember this: the CIR files you
generate will be incompatible with anyone else's software. So
if you want to switch downstream, you will have to re-enter all
the schematic information.
Of course, MicroCap and the rest will generate and read CKT
files, so you can enter the schematic in one program and run it
in another.
If it converges :)
[... not much worth remembering..]
> That's the story. Overall, I'd recommend using MicroCap to get
> your feet wet. Download all the tutorials at
>
> http://www.intusoft.com/Tech.htm, including
>
> Converg.pdf: Solving SPICE convergence problems, and
>
> Correlat.pdf: Comparisons of SPICE simulations and real hardware
[...]
Sorry, Correlat.pdf is worthless. 2,295,552 bytes, 9 pages,
several misaligned graphics images on each page, no text or
comments or justification for the 20 minutes wasted to
download.
Typical PDF bloat. GIF files would have taken 10k or less.
Thanks for the info. I may well try again, since the single-user version
of TINA Plus (paid-for!) has a F-F-F...ascinating dongle! Grr!
OK, enough on 1kV dc-dc converters... Yes, you're right Chuck, our 1kV FET
was being used "right against its specs," but that's the world of nA design.
Few parts have specs for operation at these starved current levels, and we
use them with devices-physics knowledge plus some empirical measurements as
justification for the design modelling. With that in mind, let's tackle
one more 1kV micropower project before this thread dies.
For our next act... A 1kV micropower Schmitt trigger.
Recall that a Schmitt trigger is a voltage-threshold-sensing circuit which
has built-in hysteresis. The circuit has two FET transistors that share a
common source connection and a current-sinking resistor to ground. In a
Schmitt circuit, this current is steered between the two FET drains as a
function of the input voltage, switching the output from ON to OFF as the
input voltage rises. You may want to redraw the circuit below for clarity.
One unusual thing you'll see in the circuit are two clamp diodes connected
to the FET gates. These are necessary because the maximum Vgs is 20V, much
less than the 1kV levels in this circuit. We'll assume "perfect" 5V zener
diodes for these clamps. Because Q1 has an output-clamp zener, it can be a
small 30V part, with zero leakage current.
Since we've not yet learned of any smaller 1kV FETs than the Motorola MTP
1N100 E, we must use that part for Q2. As a large power MOSFET carrying up
to 3A, it's an odd choice for micropower circuitry, but no better choice
has been forthcoming. From my previous articles, you may remember that the
1N100 leakage typically looks like a 500G-ohm resistor when shutoff at high
voltages, and therefore has 2nA of leakage at 1kV. This circuit runs Q2 at
near 2nA, taking the leakage current from Rf = 0.5T-ohms into account.
To derive the Schmitt-trigger equations, we note that with Vin low (Q1 off),
D2 conducts and Q2 is on (the output is low), so the current in Rs comes from
1kV via R1+D2 and R2. Alternately, with Vin higher, Q1 is on and Q2 off
(the output is high), and a smaller current comes from 1kV via R1 and R2+Rf.
Sharp-eyed readers will note that in this state, the current through Rs, and
thus the source voltage, Vs, is lower, which further insures that Q1 is on.
That's the hysteresis effect.
Schmitt-trigger equations are typically rather messy, so without boring you
with details, and if I didn't make any dumb mistakes, the equations for the
two source-voltage conditions, namely Vs(LO) with Vin low, and Vs(HI) are
(assuming Vin always near Vs so D1 doesn't conduct),
V+ - D2 Rp/R1 Vx
Vs(LO) = ------------- Vs(HI) = ---------
1 + Rp/Rs 1 + Rs/Rx
where Rp is the parallel combination of R1 and R2, and Rx is the parallel
combination of R1 and R2+Rf.
1kV -----+------------+-- V+
| |
R1 R2
| +-------- out
Q1 +-----, Q2 |
D | D -,
in ----+- G +--- G Rf
K S K S -'
D1 A | D2 A |
+----+-----+------+ Vs
|
Rs
|
GND
In our next installment, we'll complete the schmitt trigger design, and
evaluate its performance.
To continue, let's choose some resistor values. We'll pick 500G for both
R1 and R2, so that Rp = 250G and Rx = 333G for the equations. Sure, OK,
most of you don't have 500G resistors in the parts drawers, but then you
don't need 1kV micropower circuits either. Hah! Who does?
Let's select a Schmitt-trigger threshold, say 50V. We'll estimate that the
Vgs for Q1 is 1.0 volt at 2nA. Solving the formula for Rs, we get,
V+ - D2 Rp/R1
Rs = Rp / ( ------------- - 1 )
Vs(LO)
which with Vs(LO)=49, yields Rs = Rp/19.365 = 12.9G. Sheesh, another
hard to get part! Of course, we could use a 10G fixed resistor with a
5G series trimpot! Not to be deterred, we'll use Rs to solve the 2nd
equation, Vs(HI) = 1000/1+25.8 = 37.3V. The difference of these two Vs
voltages is our hysteresis, which is 49-37.3 = 11.7 volts.
The 12V hysteresis means that for low input voltages, with the circuit's
output state also low, the trigger thereshold is 50V. Immediately after
Vin = 50V is exceeded, the output goes HI and Vs switches to 37.3V. The
trigger's output will then stay high until the input drops below 38.3V.
For our 50V input threshold, the logic-level outputs of our Schmitt trigger
are HI = 520V, and LO = 49V. (Remember, the HI output is limited by the
500G leakage in Q2.) Some logic swings, huh!
How fast is our nano-amp 1kV trigger? Can you spell MOLASSES? For Vin
exceeding the trigger-threshold by a moderate amount, Q1 turns on removing
the drive to Q2. Then R2 charges the output capacitance of Q2, with a slow
time constant of 60pF * 250G = 15 seconds (at Vds = 25V). As the output
voltage rises, the FET's Coss capacitance drops, shortening the rise time.
OK, that's a slow ON response, but the trigger's OFF response is faster.
The easiest way to estimate the Vout = LO switching time is to observe that
after Q1 is switched off, R1 must supply all of Q2's gate charge to turn
it on plus the Crss charge to pull Vds down to 0V. Looking at figure 8 of
the 1N100 data sheet, we see 3nC will get the gate up to 5V (necessary to
switch 1A), and 2.5nC more gets the drain from 400V down to 40V. Well, ok,
we're switching 2nA, not 1A, and Vgs (on) = about 1V, so we can reduce the
first 3nC to about 1nC. With the 1.92nA current supplied by R1, it takes
about 3.5nC/1.9nA = 1.8 seconds to get Vds down to 40V, and no more than
4 sec more to 0V.
How much power does our Schmitt trigger consume from the 1kV supply? The
current can be seen by looking at the voltage across our 12.9G-ohm common
source resistor, Rs. We get 3.8nA for Vout LO, and 2.9nA for Vout HI.
That works out to about 3.4 microwatts for a 50% duty cycle input, just
about right for one of those Zamboni-pile batteries!
Hah, that'd have to be one SLOOW input.
Michael Clavien
I N D C O N T R O L P T Y L T D
Industrial Controls <> Power electronics
40-76 William Street Leichhardt 2040 Australia
Thanks very much, Michael, and merry xmas to all of you down there
as well, from all of us. But Sheesh! I certainly don't think of all
the excellent, experienced minds hard at work behind the scenes here
at sci.electronics.design, as Winfield Hill et al !!
-- Win
Incidentally, now that someone has actually admitted to being named Dot
Com, will the real E.T. Al and I. Bid please stand up?
Don't forget to mention the pithy Anon, the source of so much wit and
wisdom.
--
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Spehro Pefhany "The Journey is the reward"
sp...@interlog.com
Fax:(905) 332-4270 (small micro system devt hw/sw + mfg)
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